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3a2c65f16b
hardfault fixed
dma_pingpong
Priec
2025-11-07 20:04:20 +01:00
dd978ec65c
compiled ping pong buffer setup
Filipriec
2025-11-07 19:23:00 +01:00
3930716ac3
clean code
Filipriec
2025-11-07 19:22:46 +01:00
3134399c4e
direct solution works
master
Priec
2025-11-06 00:36:38 +01:00
9358f2e8ec
not working, i have no clue why
Priec
2025-11-05 23:40:59 +01:00
f2fda10c7a
Tx only does not work
not_working_dmaLLI_write_exact
Priec
2025-11-05 21:03:30 +01:00
f7fdd72d7f
timer stuff, yield now added, still hard fault error
Priec
2025-11-05 16:38:26 +01:00
41c31f6b2a
only improvements
Priec
2025-11-05 14:45:36 +01:00
d57d16935d
compiled, config in src/config, but i get hardfault crash at runtime
Priec
2025-11-05 09:44:41 +01:00
44f154e289
comment
Filipriec
2025-11-04 22:00:34 +01:00
92e27ad076
Last moves, comments and file organization
Priec
2025-11-03 23:25:50 +01:00
93c43dee11
redesigned, removed redundancy
Priec
2025-11-03 22:41:16 +01:00
096fe5e2b9
working now pushing to the ring buffer
Priec
2025-11-02 22:46:42 +01:00
fef7de2045
working, but data are in pipe, but we read ringbuffer, critical bug, fix now
Priec
2025-11-02 22:39:01 +01:00
15b3b96b68
compiled and working
v0.1.1b
Priec
2025-11-01 23:47:15 +01:00
4365c72688
complete movement, some parts are destroyed and not moved yet
Priec
2025-11-01 23:35:27 +01:00
63c353faac
adjusted comments
Priec
2025-11-01 14:08:27 +01:00
f24bd73c6b
compiled from main branch working with LLI DMA
Priec
2025-10-31 23:04:48 +01:00
1a4c071417
time for big update from now on
v0.1.1
Priec
2025-10-31 22:37:23 +01:00
8ce9ee9f6c
dma Rx working
Priec
2025-10-31 17:28:34 +01:00
28b468902a
Rx is not using dma now
Priec
2025-10-31 14:31:25 +01:00
0ecf821e40
moved properly
Priec
2025-10-31 13:19:54 +01:00
8de34e13d9
solution detached from main for async buffered generalized2
Priec
2025-10-31 13:00:21 +01:00
457d783d3b
FINAL FIX WORKING OH MY GOSH YES, We have to leak the timer to keep it toggled on after going out of scope to not call destructor
Priec
2025-10-31 11:46:21 +01:00
172dd899f9
debugging
Priec
2025-10-31 10:26:33 +01:00
f56fe0561b
timer is now separated
Priec
2025-10-31 00:05:19 +01:00
f2b6590473
the Tx is finished
Priec
2025-10-30 23:37:53 +01:00
e09231635f
working
Priec
2025-10-30 12:22:47 +01:00
8072ea15f0
DMA working
Priec
2025-10-29 23:23:20 +01:00
1c15d4d669
ready for dma implemenatation
Priec
2025-10-29 22:48:36 +01:00
c78af52849
dma transfering from buffer to the gpio
Priec
2025-10-29 21:37:08 +01:00
62303e7cf1
interrupt is wrong
Filipriec
2025-10-28 17:39:27 +01:00
5a7e5c6497
working but probably wrong. timer + bit turn on for semestralka1
Filipriec
2025-10-28 17:27:19 +01:00
90f8a1769f
starting sofware emulation of uart
Filipriec
2025-10-28 15:07:16 +01:00
847b6258a5
copy only
Filipriec
2025-10-28 15:02:53 +01:00
73c45bff85
timer working
Priec
2025-10-23 12:08:59 +02:00
7da55196e7
looking amazing, time for timer testing to improve performance to the maximum
Priec
2025-10-22 23:31:10 +02:00
9ac4f81975
still not there yet
Priec
2025-10-22 22:26:02 +02:00
706867818e
100% cpu workage showing safe results
Priec
2025-10-22 21:11:37 +02:00
7149bfab61
buffered generalized working
Priec
2025-10-22 08:12:34 +02:00
311de67247
uart getting better
Priec
2025-10-21 22:55:02 +02:00
26791906ac
working async buffered uart
Priec
2025-10-21 22:52:34 +02:00
f610a84ed0
working async uart properly well
Priec
2025-10-21 19:49:39 +02:00
98ee0b2617
working properly well
Filipriec
2025-10-21 19:26:58 +02:00
c000fd85f4
working blocking uart
Filipriec
2025-10-21 17:22:27 +02:00
a3344efcde
fixed properly
Priec
2025-10-21 11:28:07 +02:00
4f486eaead
printing in a loop
Priec
2025-10-21 09:08:53 +02:00
43af240f51
info! printing to the terminal
Priec
2025-10-21 09:07:44 +02:00
bf44bcc5d0
fixed
Priec
2025-10-21 08:18:36 +02:00
c6709f6aac
cleaned flake
Priec
2025-10-20 22:52:43 +02:00
deee05afb5
working hal_test
Priec
2025-10-20 22:37:21 +02:00
da01c4593e
fixed gitignores
Priec
2025-10-20 20:30:16 +02:00
621de5f37c
examples builded
Filipriec
2025-10-20 18:06:32 +02:00
bab60914b0
cleared rust repo for stm32
Filipriec
2025-10-20 17:45:49 +02:00
8fbe8e05eb
embassy hal
Priec
2025-10-19 23:26:33 +02:00
cc94aab412
tim2 compiled
Priec
2025-10-12 18:07:37 +02:00
325f47debc
compiled with memory file
Priec
2025-10-07 11:29:44 +02:00
52e8a9385e
correct target
Priec
2025-10-07 11:25:16 +02:00
0836af0f4f
stm32 should now work
Priec
2025-10-07 11:19:43 +02:00