filipriec/stm32_rust
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small naming conventions

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This commit is contained in:
Priec
2025-11-11 23:30:03 +01:00
parent c1d0fa9d04
commit a35d1df67f
4 changed files with 27 additions and 21 deletions
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18
semestralka_1/src/bin/main.rs
View File

@@ -7,14 +7,13 @@ use embassy_executor::Spawner;
use embassy_time::Instant;
use embassy_stm32::dma::Request;
use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
use dma_gpio::software_uart::{
dma_timer::{init_tim6_for_uart, init_tim7_for_uart},
gpio_dma_uart_rx::rx_dma_task,
debug::dump_tim6_regs,
};
use dma_gpio::config::{BAUD, RX_OVERSAMPLE, TX_OVERSAMPLE};
use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES, PIPE_RX_SIZE};
use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES};
use dma_gpio::software_uart::gpio_dma_uart_tx::tx_dma_task;
use static_cell::StaticCell;
use embassy_futures::yield_now;
@@ -23,6 +22,7 @@ use dma_gpio::hw_uart_pc::driver::uart_task;
use embassy_stm32::usart::{BufferedUart, Config, BufferedInterruptHandler};
use embassy_stm32::peripherals;
use embassy_stm32::bind_interrupts;
use dma_gpio::config::{PIPE_SW_TX, PIPE_SW_RX};
use {defmt_rtt as _, panic_probe as _};
bind_interrupts!(struct Irqs {
@@ -31,9 +31,8 @@ bind_interrupts!(struct Irqs {
// Software uart
pub const TIM6_UP_REQ: Request = 4;
static PIPE_RX: Pipe<CriticalSectionRawMutex, PIPE_RX_SIZE> = Pipe::new();
static TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
static RX_RING: StaticCell<[u8; RX_RING_BYTES]> = StaticCell::new();
static SW_TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
static SW_RX_RING: StaticCell<[u8; RX_RING_BYTES]> = StaticCell::new();
#[embassy_executor::main]
async fn main(spawner: Spawner) {
@@ -42,7 +41,6 @@ async fn main(spawner: Spawner) {
info!("init m8");
// HARDWARE UART to the PC
let mut cfg = Config::default();
cfg.baudrate = BAUD;
static TX_BUF: StaticCell<[u8; 256]> = StaticCell::new();
@@ -68,14 +66,14 @@ async fn main(spawner: Spawner) {
dump_tim6_regs();
// Safe one-time init from StaticCell
let rx_ring: &mut [u8; RX_RING_BYTES] = RX_RING.init([0; RX_RING_BYTES]);
let tx_ring_mem: &mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]);
spawner.spawn(rx_dma_task(p.GPDMA1_CH1, rx_ring, &PIPE_RX).unwrap());
let sw_rx_ring: &mut [u8; RX_RING_BYTES] = SW_RING_RX.init([0; RX_RING_BYTES]);
let sw_tx_ring: &mut [u32; TX_RING_BYTES] = SW_RING_TX.init([0; TX_RING_BYTES]);
spawner.spawn(rx_dma_task(p.GPDMA1_CH1, rx_ring, &PIPE_SW_RX).unwrap());
// Create and start the TX DMA ring in main.
// let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, tx_ring_mem, &PIPE_RX).unwrap());
spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, sw_tx_ring, &PIPE_SW_TX).unwrap());
// EDN OF SOFTWARE UART
let mut last_yield = Instant::now();

14
semestralka_1/src/config.rs
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@@ -1,13 +1,25 @@
// src/config.rs
use crate::software_uart::uart_emulation::{Parity, StopBits, UartConfig};
use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
use embassy_sync::pipe::Pipe;
pub const BAUD: u32 = 115_200;
pub const TX_PIN_BIT: u8 = 2; // PA2
pub const TX_OVERSAMPLE: u16 = 1;
pub const RX_OVERSAMPLE: u16 = 16;
pub const RX_RING_BYTES: usize = 4096;
pub const TX_RING_BYTES: usize = 4096;
pub const PIPE_RX_SIZE: usize = 256;
pub const PIPE_HW_TX_SIZE: usize = 1024;
pub const PIPE_HW_RX_SIZE: usize = 1024;
pub const PIPE_SW_TX_SIZE: usize = 256;
pub const PIPE_SW_RX_SIZE: usize = 256;
pub static PIPE_HW_TX: Pipe<CriticalSectionRawMutex, PIPE_HW_TX_SIZE> = Pipe::new();
pub static PIPE_HW_RX: Pipe<CriticalSectionRawMutex, PIPE_HW_RX_SIZE> = Pipe::new();
pub static PIPE_SW_TX: Pipe<CriticalSectionRawMutex, PIPE_SW_TX_SIZE> = Pipe::new();
pub static PIPE_SW_RX: Pipe<CriticalSectionRawMutex, PIPE_SW_RX_SIZE> = Pipe::new();
pub const UART_CFG: UartConfig = UartConfig {
data_bits: 8,

2
semestralka_1/src/hw_uart_pc/driver.rs
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@@ -1,4 +1,4 @@
// src/uart/driver.rs
// src/hw_uart_pc/driver.rs
use defmt::unwrap;
use embassy_futures::select::{select, Either};
use embassy_stm32::usart::BufferedUart;

14
semestralka_1/src/hw_uart_pc/usart1.rs
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@@ -1,22 +1,18 @@
// src/uart/usart1.rs
use defmt::info;
use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
use embassy_sync::pipe::Pipe;
use embassy_time::Duration;
use crate::hw_uart_pc::safety::{preflight_and_suggest_yield_period, RX_PIPE_CAP, TX_PIPE_CAP};
use crate::hw_uart_pc::safety::preflight_and_suggest_yield_period;
use crate::hw_uart_pc::driver::UartHandle;
// Static pipes and buffers
static UART1_TX_PIPE: Pipe<CriticalSectionRawMutex, TX_PIPE_CAP> = Pipe::new();
static UART1_RX_PIPE: Pipe<CriticalSectionRawMutex, RX_PIPE_CAP> = Pipe::new();
use crate::config::{PIPE_HW_TX, PIPE_HW_RX};
pub fn setup_and_spawn(baudrate: u32,) -> (UartHandle, Duration) {
let yield_period: Duration = preflight_and_suggest_yield_period(baudrate);
info!("HW USART1 safe");
let handle = UartHandle {
tx: &UART1_TX_PIPE,
rx: &UART1_RX_PIPE,
tx: &PIPE_HW_TX,
rx: &PIPE_HW_RX,
yield_period,
};