This website requires JavaScript.
Explore
Help
Sign In
filipriec
/
FPGA---VHDL
Watch
1
Star
0
Fork
0
You've already forked FPGA---VHDL
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
7
Commits
1
Branch
0
Tags
6af72b448af4c62a1990e595dba99e45c1d94e7a
Go to file
Code
Clone
HTTPS
Tea CLI
Open with VS Code
Open with VSCodium
Open with Intellij IDEA
Download ZIP
Download TAR.GZ
Download BUNDLE
Filipriec
6af72b448a
basys 3 imported to project 6
2026-03-16 12:35:52 +01:00
project_1
working z predoslych hodin
2026-03-09 14:04:31 +01:00
project_2
working z predoslych hodin
2026-03-09 14:04:31 +01:00
project_3_nzio
working z predoslych hodin
2026-03-09 14:04:31 +01:00
project_4
nakreslene zadanie
2026-03-09 14:05:17 +01:00
project_5
hotovy priklad 5 funguje uplne bez problemov
2026-03-09 17:03:42 +01:00
project_6/project_6.srcs/constrs_1/imports
/Downloads
basys 3 imported to project 6
2026-03-16 12:35:52 +01:00
.gitignore
working z predoslych hodin
2026-03-09 14:04:31 +01:00
Description
To co sme robili v skole
1.3
MiB
Languages
Tcl
54.4%
VHDL
45.6%
