Filipriec 41f88a7072 alarm

2026-04-20 17:17:13 +02:00

project_1

working z predoslych hodin

2026-03-09 14:04:31 +01:00

project_2

working z predoslych hodin

2026-03-09 14:04:31 +01:00

project_3_nzio

working z predoslych hodin

2026-03-09 14:04:31 +01:00

project_4

nakreslene zadanie

2026-03-09 14:05:17 +01:00

project_5

hotovy priklad 5 funguje uplne bez problemov

2026-03-09 17:03:42 +01:00

project_6

workinghod 6 a hod7

2026-04-13 12:33:42 +02:00

project_7

alarm

2026-04-20 17:17:13 +02:00

project_7_hodiny/project_6.srcs

clock

2026-03-23 14:04:42 +01:00

.gitignore

working z predoslych hodin

2026-03-09 14:04:31 +01:00

vhdl_ls.toml

vhdl lsp

2026-04-20 13:58:00 +02:00

Description

To co sme robili v skole

2.8 MiB

Languages

VHDL 53.2%

Tcl 41.7%

Mermaid 5.1%