filipriec/FPGA---VHDL
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
8 Commits 2 Branches 2 Tags
sk_pc
Go to file
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
filipriec skolsky PC 3e2b49671e working buttons and DIN to control display
2026-03-23 17:22:08 +01:00
project_1
working z predoslych hodin
2026-03-09 14:04:31 +01:00
project_2
working z predoslych hodin
2026-03-09 14:04:31 +01:00
project_3_nzio
working z predoslych hodin
2026-03-09 14:04:31 +01:00
project_4
nakreslene zadanie
2026-03-09 14:05:17 +01:00
project_5
hotovy priklad 5 funguje uplne bez problemov
2026-03-09 17:03:42 +01:00
project_6
workinghod 6 a hod7
2026-03-23 16:43:42 +01:00
project_7
working buttons and DIN to control display
2026-03-23 17:22:08 +01:00
.gitignore
working z predoslych hodin
2026-03-09 14:04:31 +01:00
Description
To co sme robili v skole
2.8 MiB
Languages
VHDL 53.2%
Tcl 41.7%
Mermaid 5.1%