Filipriec 1909497403 hopefuly working CPU transfer to bsrr

2025-11-18 13:36:07 +01:00

dma_gpio

restored Rx ring properly well with the dma_gpio2 initialized

2025-11-10 18:11:28 +01:00

dma_gpio2

priec - filip user

2025-11-11 22:08:59 +01:00

hal_adc

fixed properly

2025-10-21 11:28:07 +02:00

hal_rng

printing in a loop

2025-10-21 09:08:53 +02:00

hal_test

fixed

2025-10-21 08:18:36 +02:00

semestralka_1

there is some bug

2025-11-12 16:07:59 +01:00

semestralka_1b_rx

tx stale nefunguje

2025-11-12 23:37:32 +01:00

semestralka_1c_tx

blbosti

2025-11-18 09:20:57 +01:00

semestralka_1d_rx_bez_dma

hopefuly working CPU transfer to bsrr

2025-11-18 13:36:07 +01:00

semestralka_1e_tx_bez_dma

hopefuly working CPU transfer to bsrr

2025-11-18 13:36:07 +01:00

semestralka_1f_rx_bez_dma_toggle

hopefuly working CPU transfer to bsrr

2025-11-18 13:36:07 +01:00

time_meas

timer working

2025-10-23 12:08:59 +02:00

usart_async_buffered

uart getting better

2025-10-21 22:55:02 +02:00

usart_async_buffered_generalized

100% cpu workage showing safe results

2025-10-22 21:11:37 +02:00

usart_async_buffered_generalized2

moved properly

2025-10-31 13:19:54 +01:00

usart_async_dma

working async buffered uart

2025-10-21 22:52:34 +02:00

usart_blocking

working blocking uart

2025-10-21 17:22:27 +02:00

.gitignore

ready for dma implemenatation

2025-10-29 22:48:36 +01:00

datasheet.txt

ready for dma implemenatation

2025-10-29 22:48:36 +01:00

flake.lock

stm32 should now work

2025-10-07 11:19:43 +02:00

flake.nix

blbosti

2025-11-18 09:20:57 +01:00

pinout1.png

DMA working

2025-10-29 23:23:20 +01:00

pinout2.png

DMA working

2025-10-29 23:23:20 +01:00

Description

No description provided

46 MiB

Languages

Rust 97%

Makefile 2.5%

Nix 0.5%