moves

semestralka_2_uart/.cargo/config.toml

@@ -0,0 +1,19 @@
+[build]
+target = "thumbv8m.main-none-eabihf"
+
+[target.thumbv8m.main-none-eabihf]
+runner = "probe-rs run --chip STM32U575ZITxQ"
+
+rustflags = [
+  "-C", "linker=rust-lld",
+  "-C", "link-arg=-Tlink.x",
+  "-C", "link-arg=-Tdefmt.x",
+  "-C", "link-arg=--nmagic",
+]
+
+[package.metadata.cargo-flash]
+chip = "STM32U575ZIT"
+
+[env]
+CC_thumbv8m_main_none_eabihf = "arm-none-eabi-gcc"
+AR_thumbv8m_main_none_eabihf = "arm-none-eabi-ar"

semestralka_2_uart/.gitignore

@@ -0,0 +1 @@
+/target

semestralka_2_uart/Cargo.toml

@@ -0,0 +1,49 @@
+[package] 
+authors = ["Priec <filippriec@gmail.com>"] 
+name = "dma_gpio"
+edition = "2024"
+version = "0.1.0"
+
+
+[dependencies]
+cortex-m = { version = "0.7.7", features = ["inline-asm", "critical-section-single-core"] }
+cortex-m-rt = "0.7.5"
+panic-halt = "1.0.0"
+
+embassy-executor = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["arch-cortex-m", "executor-thread"] }
+embassy-futures = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
+embassy-sync    = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
+embassy-time    = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["tick-hz-32_768"] }
+embassy-hal-internal = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
+embassy-usb = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
+embassy-stm32 = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["unstable-pac", "stm32u575zi", "time-driver-tim2", "memory-x", "defmt", "exti"] }
+
+embedded-hal = "1.0.0"
+embedded-graphics = "0.8.1"
+heapless = { version = "0.9.1", default-features = false }
+micromath = "2.1.0"
+tinybmp = "0.6.0"
+panic-probe = { version = "1.0.0", features = ["defmt"] }
+defmt-rtt = "1.1.0"
+defmt = "1.0.1"
+static_cell = "2.1.1"
+embedded-io = "0.6.1"
+embedded-io-async = "0.6.1"
+
+[dev-dependencies]
+defmt-test = "0.4.0"
+
+[build-dependencies]
+cc = "1.2.48"
+
+[[test]]
+name = "uart_emulation"
+harness = false
+
+[lib]
+test = false
+
+[[bin]]
+name = "main"
+path = "src/bin/main.rs"
+test = false

semestralka_2_uart/LICENSE-APACHE

@@ -0,0 +1,201 @@
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semestralka_2_uart/LICENSE-MIT

@@ -0,0 +1,23 @@
+Permission is hereby granted, free of charge, to any
+person obtaining a copy of this software and associated
+documentation files (the "Software"), to deal in the
+Software without restriction, including without
+limitation the rights to use, copy, modify, merge,
+publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software
+is furnished to do so, subject to the following
+conditions:
+
+The above copyright notice and this permission notice
+shall be included in all copies or substantial portions
+of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
+ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
+TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
+SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
+IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.

semestralka_2_uart/Makefile

@@ -0,0 +1,23 @@
+TARGET = thumbv8m.main-none-eabihf
+CHIP = STM32U575ZI
+BIN = stm32u5-blinky
+MODE ?= release
+TARGET_DIR = target/$(TARGET)/$(MODE)
+ELF = $(TARGET_DIR)/$(BIN)
+PROBE = probe-rs
+
+.PHONY: all build flash clean empty
+
+all: build
+
+build:
+	cargo build --$(MODE)
+
+flash: build
+	$(PROBE) run --chip $(CHIP) $(ELF)
+
+empty:
+	$(PROBE) erase --chip $(CHIP)
+
+clean:
+	cargo clean

semestralka_2_uart/README.md

@@ -0,0 +1,232 @@
+# `app-template`
+
+> Quickly set up a [`probe-rs`] + [`defmt`] + [`flip-link`] embedded project
+
+[`probe-rs`]: https://crates.io/crates/probe-rs
+[`defmt`]: https://github.com/knurling-rs/defmt
+[`flip-link`]: https://github.com/knurling-rs/flip-link
+
+## Dependencies
+
+### 1. `flip-link`:
+
+```bash
+cargo install flip-link
+```
+
+### 2. `probe-rs`:
+
+Install probe-rs by following the instructions at <https://probe.rs/docs/getting-started/installation/>.
+
+### 3. [`cargo-generate`]:
+
+```bash
+cargo install cargo-generate
+```
+
+[`cargo-generate`]: https://crates.io/crates/cargo-generate
+
+> *Note:* You can also just clone this repository instead of using `cargo-generate`, but this involves additional manual adjustments.
+
+## Setup
+
+### 1. Initialize the project template
+
+```bash
+cargo generate \
+    --git https://github.com/knurling-rs/app-template \
+    --branch main \
+    --name my-app
+```
+
+If you look into your new `my-app` folder, you'll find that there are a few `TODO`s in the files marking the properties you need to set.
+
+Let's walk through them together now.
+
+### 2. Set `probe-rs` chip
+
+Pick a chip from ` probe-rs chip list` and enter it into `.cargo/config.toml`.
+
+If, for example, you have a nRF52840 Development Kit as used in one of [our exercises], replace `{{chip}}` with `nRF52840_xxAA`.
+
+[our workshops]: https://rust-exercises.ferrous-systems.com
+
+```diff
+ # .cargo/config.toml
+-runner = ["probe-rs", "run", "--chip", "$CHIP", "--log-format=oneline"]
++runner = ["probe-rs", "run", "--chip", "nRF52840_xxAA", "--log-format=oneline"]
+```
+
+### 3. Adjust the compilation target
+
+In `.cargo/config.toml`, pick the right compilation target for your board.
+
+```diff
+ # .cargo/config.toml
+ [build]
+-target = "thumbv6m-none-eabi"    # Cortex-M0 and Cortex-M0+
+-# target = "thumbv7m-none-eabi"    # Cortex-M3
+-# target = "thumbv7em-none-eabi"   # Cortex-M4 and Cortex-M7 (no FPU)
+-# target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
++target = "thumbv7em-none-eabihf" # Cortex-M4F (with FPU)
+```
+
+Add the target with `rustup`.
+
+```bash
+rustup target add thumbv7em-none-eabihf
+```
+
+### 4. Add a HAL as a dependency
+
+In `Cargo.toml`, list the Hardware Abstraction Layer (HAL) for your board as a dependency.
+
+For the nRF52840 you'll want to use the [`nrf52840-hal`].
+
+[`nrf52840-hal`]: https://crates.io/crates/nrf52840-hal
+
+```diff
+ # Cargo.toml
+ [dependencies]
+-# some-hal = "1.2.3"
++nrf52840-hal = "0.14.0"
+```
+
+⚠️ Note for RP2040 users ⚠️
+
+You will need to not just specify the `rp-hal` HAL, but a BSP (board support crate) which includes a second stage bootloader. Please find a list of available BSPs [here](https://github.com/rp-rs/rp-hal-boards#packages).
+
+### 5. Import your HAL
+
+Now that you have selected a HAL, fix the HAL import in `src/lib.rs`
+
+```diff
+ // my-app/src/lib.rs
+-// use some_hal as _; // memory layout
++use nrf52840_hal as _; // memory layout
+```
+
+### (6. Get a linker script)
+
+Some HAL crates require that you manually copy over a file called `memory.x` from the HAL to the root of your project. For nrf52840-hal, this is done automatically so no action is needed. For other HAL crates, see their documentation on where to find an example file.
+
+The `memory.x` file should look something like:
+
+```text
+MEMORY
+{
+  FLASH : ORIGIN = 0x00000000, LENGTH = 1024K
+  RAM   : ORIGIN = 0x20000000, LENGTH = 256K
+}
+```
+
+The `memory.x` file is included in the `cortex-m-rt` linker script `link.x`, and so `link.x` is the one you should tell `rustc` to use (see the `.cargo/config.toml` file where we do that).
+
+### 7. Run!
+
+You are now all set to `cargo-run` your first `defmt`-powered application!
+There are some examples in the `src/bin` directory.
+
+Start by `cargo run`-ning `my-app/src/bin/hello.rs`:
+
+```console
+$ # `rb` is an alias for `run --bin`
+$ cargo rb hello
+    Finished `dev` profile [optimized + debuginfo] target(s) in 0.01s
+     Running `probe-rs run --chip nrf52840_xxaa --log-format=oneline target/thumbv6m-none-eabi/debug/hello`
+      Erasing ✔ 100% [####################]   8.00 KiB @  15.79 KiB/s (took 1s)
+  Programming ✔ 100% [####################]   8.00 KiB @  13.19 KiB/s (took 1s)                                                                                                                        Finished in 1.11s
+Hello, world!
+
+$ echo $?
+0
+```
+
+If you're running out of memory (`flip-link` bails with an overflow error), you can decrease the size of the device memory buffer by setting the `DEFMT_RTT_BUFFER_SIZE` environment variable. The default value is 1024 bytes, and powers of two should be used for optimal performance:
+
+```console
+$ DEFMT_RTT_BUFFER_SIZE=64 cargo rb hello
+```
+
+### (8. Set `rust-analyzer.linkedProjects`)
+
+If you are using [rust-analyzer] with VS Code for IDE-like features you can add following configuration to your `.vscode/settings.json` to make it work transparently across workspaces. Find the details of this option in the [RA docs].
+
+```json
+{
+    "rust-analyzer.linkedProjects": [
+        "Cargo.toml",
+        "firmware/Cargo.toml",
+    ]
+}
+```
+
+[RA docs]: https://rust-analyzer.github.io/manual.html#configuration
+[rust-analyzer]: https://rust-analyzer.github.io/
+
+## Running tests
+
+The template comes configured for running unit tests and integration tests on the target.
+
+Unit tests reside in the library crate and can test private API; the initial set of unit tests are in `src/lib.rs`.
+`cargo test --lib` will run those unit tests.
+
+```console
+$ cargo test --lib
+   Compiling example v0.1.0 (./knurling-rs/example)
+    Finished `test` profile [optimized + debuginfo] target(s) in 0.15s
+     Running unittests src/lib.rs (target/thumbv6m-none-eabi/debug/deps/example-2b0d0e25d141bf57)
+      Erasing ✔ 100% [####################]   8.00 KiB @  15.99 KiB/s (took 1s)
+  Programming ✔ 100% [####################]   8.00 KiB @  13.33 KiB/s (took 1s)                                                                                                                        Finished in 1.10s
+(1/1) running `it_works`...
+all tests passed!
+```
+
+Integration tests reside in the `tests` directory; the initial set of integration tests are in `tests/integration.rs`.
+`cargo test --test integration` will run those integration tests.
+Note that the argument of the `--test` flag must match the name of the test file in the `tests` directory.
+
+```console
+$ cargo test --test integration
+   Compiling example v0.1.0 (./knurling-rs/example)
+    Finished `test` profile [optimized + debuginfo] target(s) in 0.10s
+     Running tests/integration.rs (target/thumbv6m-none-eabi/debug/deps/integration-aaaff41151f6a722)
+      Erasing ✔ 100% [####################]   8.00 KiB @  16.03 KiB/s (took 0s)
+  Programming ✔ 100% [####################]   8.00 KiB @  13.19 KiB/s (took 1s)                                                                                                                        Finished in 1.11s
+(1/1) running `it_works`...
+all tests passed!
+```
+
+Note that to add a new test file to the `tests` directory you also need to add a new `[[test]]` section to `Cargo.toml`.
+
+To run all the tests via `cargo test` the tests need to be explicitly disabled for all the existing binary targets.
+See `Cargo.toml` for details on how to do this.
+
+## Support
+
+`app-template` is part of the [Knurling] project, [Ferrous Systems]' effort at
+improving tooling used to develop for embedded systems.
+
+If you think that our work is useful, consider sponsoring it via [GitHub
+Sponsors].
+
+## License
+
+Licensed under either of
+
+- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
+  http://www.apache.org/licenses/LICENSE-2.0)
+
+- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
+
+at your option.
+
+### Contribution
+
+Unless you explicitly state otherwise, any contribution intentionally submitted
+for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
+licensed as above, without any additional terms or conditions.
+
+[Knurling]: https://knurling.ferrous-systems.com
+[Ferrous Systems]: https://ferrous-systems.com/
+[GitHub Sponsors]: https://github.com/sponsors/knurling-rs

semestralka_2_uart/build.rs

@@ -0,0 +1,59 @@
+// build.rs
+
+use std::env;
+use std::path::PathBuf;
+
+fn main() {
+    let cube_path = PathBuf::from("/home/priec/programs/STM32CubeU5");
+
+    let hal_driver = cube_path.join("Drivers/STM32U5xx_HAL_Driver");
+    let cmsis = cube_path.join("Drivers/CMSIS");
+    let device = cmsis.join("Device/ST/STM32U5xx");
+    let example_inc = cube_path.join("Projects/NUCLEO-U575ZI-Q/Examples/GPIO/GPIO_IOToggle/Inc");
+
+    // HAL source files
+    let hal_srcs = [
+        "stm32u5xx_hal.c",
+        "stm32u5xx_hal_rcc.c",
+        "stm32u5xx_hal_rcc_ex.c",
+        "stm32u5xx_hal_pwr.c",
+        "stm32u5xx_hal_pwr_ex.c",
+        "stm32u5xx_hal_gpio.c",
+        "stm32u5xx_hal_cortex.c",
+        "stm32u5xx_hal_flash.c",
+        "stm32u5xx_hal_flash_ex.c",
+        "stm32u5xx_hal_icache.c",
+        "stm32u5xx_hal_ramcfg.c",
+        "stm32u5xx_hal_rtc.c",
+        "stm32u5xx_hal_rtc_ex.c",
+        "stm32u5xx_hal_iwdg.c",
+    ];
+
+    let mut build = cc::Build::new();
+
+    // system_stm32u5xx.c adds SystemCoreClock, tables, etc.
+    build.file(device.join("Source/Templates/system_stm32u5xx.c"));
+    for src in hal_srcs {
+        build.file(hal_driver.join("Src").join(src));
+    }
+
+    build.file("src/c_ll/stop0_ll.c");
+
+    build
+        .include(hal_driver.join("Inc"))
+        .include(device.join("Include"))
+        .include(cmsis.join("Core/Include"))
+        .include(&example_inc)
+        .define("USE_HAL_DRIVER", None)
+        .define("STM32U575xx", None)
+        .define("HAL_IWDG_MODULE_ENABLED", None)
+        .flag("-mthumb")
+        .flag("-march=armv8-m.main+fp.dp")
+        .flag("-mfloat-abi=hard")
+        .warnings(false)
+        .compile("stm32u5_hal");
+
+    println!("cargo:rerun-if-changed=build.rs");
+    println!("cargo:rerun-if-changed={}", hal_driver.display());
+    println!("cargo:rerun-if-changed={}", example_inc.display());
+}

semestralka_2_uart/src/bin/main.rs

@@ -0,0 +1,83 @@
+// src/bin/main.rs
+#![no_std]
+#![no_main]
+
+use defmt::*;
+use embassy_stm32::pac;
+use embassy_executor::{Spawner, task};
+use embassy_stm32::Config;
+use embassy_stm32::gpio::{Output, Level, Speed};
+use embassy_time::{Duration, Timer};
+
+use dma_gpio::config::BAUD;
+use dma_gpio::wakeup::iwdg::clear_wakeup_flags;
+use dma_gpio::wakeup::gpio::gpio_wakeup;
+use dma_gpio::logic::handler::execute_low_power;
+use dma_gpio::hw_uart_pc::init::init_hw_uart_to_pc;
+use dma_gpio::logic::uart_cmd::CMD_CH;
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(spawner: Spawner) {
+    info!("boot");
+    let p = embassy_stm32::init(Config::default());
+    let mut led = Output::new(p.PA3, Level::Low, Speed::Low);
+    let _led_ground = Output::new(p.PB0, Level::Low, Speed::Low);
+    info!("init m8");
+
+    clear_wakeup_flags();
+
+    led.set_high();
+    info!("LED ON (MCU awake)");
+
+    // LED BLINK
+    // spawner.spawn(led_blink(led).unwrap());
+    
+    // INIT HW UART
+    init_hw_uart_to_pc(p.USART1, p.PA10, p.PA9, &spawner);
+
+    // DEBUG INFO
+    let dbg = pac::DBGMCU;
+    let cr = dbg.cr().read();
+    info!("DBGMCU CR: dbg_stop={}, dbg_standby={}", cr.dbg_stop(), cr.dbg_standby());
+
+    use dma_gpio::config::WATCHDOG_TIMEOUT_US;
+    info!(
+        "Baud: {} bps | Watchdog: {}s\n\
+         UART1 TX=PA9 RX=PA10\n\
+         Modes via UART input:\n\
+         [1] Standby + 8 KB SRAM2 retention\n\
+         [2] Standby + full SRAM2 retention\n\
+         [3] Standby — minimal power, SRAM2 lost\n\
+         [4] Shutdown — lowest power, full reset on wake\n\
+         [5] STOP mode (then choose: 0-3 for mode, 1-3 for entry method)",
+         BAUD, WATCHDOG_TIMEOUT_US / 1_000_000
+    );
+
+    // disabling st-link debug
+    dbg.cr().modify(|w| {
+        w.set_dbg_standby(false);
+        w.set_dbg_stop(false);
+    });
+    // END OF DEBUG INFO
+
+    // MAIN LOOP
+    Timer::after(Duration::from_millis(10)).await;
+
+    info!("ready for uart");
+    let mut iwdg = Some(p.IWDG);
+    
+    spawner.spawn(gpio_wakeup(p.PA0, p.EXTI0).unwrap()); // exti wake up
+    loop {
+        let cmd = CMD_CH.receive().await;
+        execute_low_power(cmd, &mut iwdg).await;
+    }
+}
+
+#[task]
+async fn led_blink(mut led: Output<'static>) {
+    loop {
+        led.toggle();
+        Timer::after(Duration::from_millis(300)).await;
+    }
+}

semestralka_2_uart/src/c_ll/stop0_ll.c

@@ -0,0 +1,8 @@
+#include "stm32u5xx_ll_pwr.h"
+
+void rust_LL_PWR_SetPowerMode(unsigned int mode)
+{
+    // Configure STOP0
+    LL_PWR_SetPowerMode(mode);
+
+}

semestralka_2_uart/src/config.rs

@@ -0,0 +1,12 @@
+// src/config.rs
+use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
+use embassy_sync::pipe::Pipe;
+
+pub const BAUD: u32 = 9_600;
+pub const PIPE_HW_TX_SIZE: usize = 1024;
+pub const PIPE_HW_RX_SIZE: usize = 1024;
+
+pub const WATCHDOG_TIMEOUT_US: u32 = 2_000_000;  // 2 seconds
+
+pub static PIPE_HW_TX: Pipe<CriticalSectionRawMutex, PIPE_HW_TX_SIZE> = Pipe::new();
+pub static PIPE_HW_RX: Pipe<CriticalSectionRawMutex, PIPE_HW_RX_SIZE> = Pipe::new();

semestralka_2_uart/src/hw_uart_pc/driver.rs

@@ -0,0 +1,41 @@
+// src/hw_uart_pc/driver.rs
+use defmt::unwrap;
+use embassy_futures::select::{select, Either};
+use embassy_stm32::usart::BufferedUart;
+use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
+use embassy_sync::pipe::Pipe;
+use embedded_io_async::{Read, Write};
+use crate::hw_uart_pc::safety::{RX_PIPE_CAP, TX_PIPE_CAP};
+use embassy_futures::yield_now;
+
+#[embassy_executor::task]
+pub async fn uart_task(
+    mut uart: BufferedUart<'static>,
+    tx_pipe: &'static Pipe<CriticalSectionRawMutex, TX_PIPE_CAP>,
+    rx_pipe: &'static Pipe<CriticalSectionRawMutex, RX_PIPE_CAP>,
+) {
+    let mut rx_byte = [0u8; 1];
+    let mut tx_buf = [0u8; 64];
+
+    loop {
+        let rx_fut = uart.read(&mut rx_byte);
+        let tx_fut = async {
+            let n = tx_pipe.read(&mut tx_buf).await;
+            n
+        };
+
+        match select(rx_fut, tx_fut).await {
+            // Incoming data from UART hardware
+            Either::First(res) => {
+                if let Ok(_) = res {
+                    let _ = rx_pipe.write(&rx_byte).await;
+                }
+            }
+            // Outgoing data waiting in TX pipe
+            Either::Second(n) => {
+                unwrap!(uart.write_all(&tx_buf[..n]).await);
+            }
+        }
+        yield_now().await;
+    }
+}

semestralka_2_uart/src/hw_uart_pc/init.rs

@@ -0,0 +1,47 @@
+// src/hw_uart_pc/init.rs
+
+use crate::config::{BAUD, PIPE_HW_TX, PIPE_HW_RX};
+use crate::hw_uart_pc::driver::uart_task;
+use crate::logic::uart_cmd::uart_cmd_task;
+use static_cell::StaticCell;
+use embassy_stm32::usart::BufferedInterruptHandler;
+use embassy_stm32::usart::{BufferedUart, Config as UsartConfig};
+use embassy_stm32::peripherals;
+use embassy_stm32::bind_interrupts;
+use embassy_executor::Spawner;
+use embassy_hal_internal::Peri;
+use embassy_stm32::peripherals::{USART1, PA9, PA10};
+use defmt::info;
+
+bind_interrupts!(struct Irqs {
+    USART1 => BufferedInterruptHandler<peripherals::USART1>;
+});
+
+pub fn init_hw_uart_to_pc(
+    usart1: Peri<'static, USART1>,
+    pa10: Peri<'static, PA10>,
+    pa9: Peri<'static, PA9>,
+    spawner: &Spawner,
+) {
+    let mut cfg = UsartConfig::default();
+    cfg.baudrate = BAUD;
+
+    static TX_BUF: StaticCell<[u8; 256]> = StaticCell::new();
+    static RX_BUF: StaticCell<[u8; 256]> = StaticCell::new();
+
+    let uart = BufferedUart::new(
+        usart1,
+        pa10, // RX pin
+        pa9,  // TX pin
+        TX_BUF.init([0; 256]),
+        RX_BUF.init([0; 256]),
+        Irqs,
+        cfg,
+    )
+    .unwrap();
+
+    spawner.spawn(uart_task(uart, &PIPE_HW_TX, &PIPE_HW_RX).unwrap());
+    spawner.spawn(uart_cmd_task().unwrap());
+
+    info!("USART1 initialized @ {} bps", BAUD);
+}

semestralka_2_uart/src/hw_uart_pc/mod.rs

@@ -0,0 +1,6 @@
+// src/hw_uart_pc/mod.rs
+
+pub mod driver;
+pub mod usart1;
+pub mod safety;
+pub mod init;

semestralka_2_uart/src/hw_uart_pc/safety.rs

@@ -0,0 +1,57 @@
+// src/safety.rs
+use defmt::info;
+use embassy_time::Duration;
+
+// ISR RX ring capacity = RX_BUF len
+const ISR_RX_BUF_CAP: usize = 256;
+// Yield 1/2 the time it takes to fill ISR RX ring.
+const YIELD_MARGIN_NUM: u32 = 1;
+const YIELD_MARGIN_DEN: u32 = 2;
+// Ensure RX_PIPE_CAP can hold this.
+const WORST_MAIN_LATENCY_MS: u32 = 20;
+
+pub const TX_PIPE_CAP: usize = 1024;
+pub const RX_PIPE_CAP: usize = 1024;
+
+
+
+/// Perform safety checks and compute yield timing to avoid buffer overflow.
+///
+/// # Panics
+/// Panics if pipe capacities are too small for the configured baud.
+pub fn preflight_and_suggest_yield_period(baud: u32) -> Duration {
+    // Approx bytes per second for 8N1 (10 bits per byte on the wire)
+    let bytes_per_sec = (baud / 10).max(1);
+
+    // Time until ISR RX ring fills, in microseconds.
+    let t_fill_us = (ISR_RX_BUF_CAP as u64) * 1_000_000u64 / (bytes_per_sec as u64);
+
+    // Choose a yield period as a fraction of t_fill.
+    let yield_us = (t_fill_us as u64)
+        .saturating_mul(YIELD_MARGIN_NUM as u64)
+        / (YIELD_MARGIN_DEN as u64);
+
+    // Verify RX pipe can absorb a worst-case app latency so uart_task
+    // can always forward without dropping when it runs.
+    let required_rx_pipe = (bytes_per_sec as u64) * (WORST_MAIN_LATENCY_MS as u64) / 1000;
+
+    if (RX_PIPE_CAP as u64) < required_rx_pipe {
+        core::panic!(
+            "RX pipe too small: have {}B, need >= {}B for {}ms at {} bps",
+            RX_PIPE_CAP, required_rx_pipe, WORST_MAIN_LATENCY_MS, baud
+        );
+    }
+
+    info!(
+        "Preflight: baud={}, rx_isr={}B, rx_pipe={}B, bytes/s={}, t_fill_us={}, yield_us={}",
+        baud,
+        ISR_RX_BUF_CAP,
+        RX_PIPE_CAP,
+        bytes_per_sec,
+        t_fill_us,
+        yield_us
+    );
+
+    // Never choose zero.
+    Duration::from_micros(yield_us.max(1) as u64)
+}

semestralka_2_uart/src/hw_uart_pc/usart1.rs

@@ -0,0 +1,12 @@
+// src/uart/usart1.rs
+use defmt::info;
+use embassy_time::Duration;
+
+use crate::hw_uart_pc::safety::preflight_and_suggest_yield_period;
+
+pub fn setup_and_spawn(baudrate: u32,) -> Duration {
+    let yield_period: Duration = preflight_and_suggest_yield_period(baudrate);
+    info!("HW USART1 safe");
+
+    yield_period
+}

semestralka_2_uart/src/lib.rs

@@ -0,0 +1,9 @@
+#![no_std]
+
+// pub mod low_power;
+// pub use low_power::*;
+pub mod hw_uart_pc;
+pub mod config;
+pub mod sleep;
+pub mod wakeup;
+pub mod logic;

semestralka_2_uart/src/logic/handler.rs

@@ -0,0 +1,67 @@
+// src/logic/handler.rs
+
+use embassy_time::{Duration, Timer};
+use embassy_stm32::peripherals;
+use embassy_stm32::Peri;
+
+use crate::sleep::stop::{enter_stop0, enter_stop1, enter_stop2, enter_stop3};
+use crate::sleep::sleep::{enter_sleep_mode, SleepEntry};
+use crate::sleep::{standby, shutdown};
+use crate::wakeup::iwdg::init_watchdog_reset;
+use crate::logic::uart_cmd::{LowPowerCmd, StopMode, StopModeConfig};
+
+use defmt::info;
+
+pub async fn execute_low_power(
+    cmd: LowPowerCmd, 
+    iwdg: &mut Option<Peri<'static, peripherals::IWDG>>
+) {
+    Timer::after(Duration::from_millis(10)).await;
+
+    match cmd {
+        LowPowerCmd::Standby8k => {
+            info!("Entering Standby with 8KB SRAM2 retention");
+            if let Some(wdg) = iwdg.take() {
+                init_watchdog_reset(wdg).await;
+            }
+            standby::enter_standby_with_sram2_8kb();
+        }
+        LowPowerCmd::StandbyFull => {
+            info!("Entering Standby with full SRAM2 retention");
+            if let Some(wdg) = iwdg.take() {
+                init_watchdog_reset(wdg).await;
+            }
+            standby::enter_standby_with_sram2_full();
+        }
+        LowPowerCmd::Standby => {
+            info!("Entering minimal Standby");
+            if let Some(wdg) = iwdg.take() {
+                init_watchdog_reset(wdg).await;
+            }
+            standby::enter_standby();
+        }
+        LowPowerCmd::Shutdown => {
+            info!("Entering Shutdown mode");
+            shutdown::enter_shutdown();
+        }
+        LowPowerCmd::StopMode(StopModeConfig { mode, entry }) => {
+            info!("Entering {:?} with {:?}", mode, entry);
+            match mode {
+                StopMode::Stop0 => enter_stop0(),
+                StopMode::Stop1 => enter_stop1(entry),
+                StopMode::Stop2 => enter_stop2(entry),
+                StopMode::Stop3 => {
+                    if let Some(wdg) = iwdg.take() {
+                        init_watchdog_reset(wdg).await;
+                    }
+                    enter_stop3(entry);
+                }
+            }
+        }
+        LowPowerCmd::Sleep => {
+            info!("Entering Sleep mode (WFI)...");
+            enter_sleep_mode(SleepEntry::Wfi);
+            info!("Woke up from Sleep mode.");
+        }
+    }
+}

semestralka_2_uart/src/logic/mod.rs

@@ -0,0 +1,4 @@
+// src/logic/mod.rs
+
+pub mod handler;
+pub mod uart_cmd;

semestralka_2_uart/src/logic/uart_cmd.rs

@@ -0,0 +1,106 @@
+// src/logic/uart_cmd.rs
+
+use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
+use embassy_sync::channel::Channel;
+
+// UART HW init
+use crate::config::{PIPE_HW_TX, PIPE_HW_RX};
+use crate::sleep::StopEntry;
+
+pub static CMD_CH: Channel<CriticalSectionRawMutex, LowPowerCmd, 1> = Channel::new();
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, defmt::Format)]
+pub enum LowPowerCmd {
+    Standby8k,     // 1
+    StandbyFull,   // 2
+    Standby,       // 3
+    Shutdown,      // 4
+    StopMode(StopModeConfig),
+    Sleep,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, defmt::Format)]
+pub struct StopModeConfig {
+    pub mode: StopMode,
+    pub entry: StopEntry,
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, defmt::Format)]
+pub enum StopMode {
+    Stop0,
+    Stop1,
+    Stop2,
+    Stop3,
+}
+
+#[embassy_executor::task]
+pub async fn uart_cmd_task() {
+    async fn print_menu() {
+        while PIPE_HW_TX.len() > 0 {
+            embassy_time::Timer::after(embassy_time::Duration::from_millis(8)).await;
+        }
+        let _ = PIPE_HW_TX.write(
+            b"\x1B[2J\x1B[H\r\n\
+            Modes:\r\n\
+            [1] Standby + 8 KB SRAM2 retention\r\n\
+            [2] Standby + full SRAM2 retention\r\n\
+            [3] Standby minimal\r\n\
+            [4] Shutdown\r\n\
+            [5] Stop mode (0-3)\r\n\
+            [6] Sleep mode (WFI or WFE)\r\n\
+            "
+        ).await;
+        embassy_time::Timer::after(embassy_time::Duration::from_millis(8)).await;
+    }
+
+    print_menu().await;
+
+    let mut b = [0u8; 2];
+    loop {
+        b.fill(0);
+        let n = PIPE_HW_RX.read(&mut b).await;
+        if n == 0 { continue; }
+
+        match b[0] {
+            b'1' => CMD_CH.send(LowPowerCmd::Standby8k).await,
+            b'2' => CMD_CH.send(LowPowerCmd::StandbyFull).await,
+            b'3' => CMD_CH.send(LowPowerCmd::Standby).await,
+            b'4' => CMD_CH.send(LowPowerCmd::Shutdown).await,
+            b'5' => {
+                let _ = PIPE_HW_TX.write(b"Enter Stop mode number (0-3): ").await;
+                b.fill(0);
+                let n = PIPE_HW_RX.read(&mut b).await;
+                if n == 0 { print_menu().await; continue; }
+                let stop_mode = match b[0] {
+                    b'0' => StopMode::Stop0,
+                    b'1' => StopMode::Stop1,
+                    b'2' => StopMode::Stop2,
+                    b'3' => StopMode::Stop3,
+                    _ => { print_menu().await; continue; }
+                };
+
+                if matches!(stop_mode, StopMode::Stop0) {
+                    CMD_CH.send(LowPowerCmd::StopMode(StopModeConfig {
+                        mode: stop_mode,
+                        entry: StopEntry::Wfi, // to tu je, lebo nejdem prepisovat kod, kvoli
+                                               // pos**temu halu co si nevie urobit konzistentnost
+                    })).await;
+                    continue;
+                }
+                let _ = PIPE_HW_TX.write(b"Enter entry method (1=WFI,2=WFE,3=WFE no clear): ").await;
+                b.fill(0);
+                let n = PIPE_HW_RX.read(&mut b).await;
+                if n == 0 { print_menu().await; continue; }
+                let entry = match b[0] {
+                    b'1' => StopEntry::Wfi,
+                    b'2' => StopEntry::Wfe,
+                    b'3' => StopEntry::WfeNoEventClear,
+                    _ => { print_menu().await; continue; }
+                };
+                CMD_CH.send(LowPowerCmd::StopMode(StopModeConfig { mode: stop_mode, entry })).await;
+            },
+            b'6' => CMD_CH.send(LowPowerCmd::Sleep).await,
+            _ => { print_menu().await; continue; }
+        }
+    }
+}

semestralka_2_uart/src/sleep/mod.rs

@@ -0,0 +1,8 @@
+// src/sleep/mod.rs
+
+pub mod standby;
+pub mod shutdown;
+pub mod stop;
+pub mod sleep;
+
+pub use stop::StopEntry;

semestralka_2_uart/src/sleep/shutdown.rs

@@ -0,0 +1,13 @@
+// src/sleep/standby.rs
+
+pub fn enter_shutdown() -> ! {
+    unsafe extern "C" {
+        fn HAL_PWREx_EnterSHUTDOWNMode();
+    }
+
+    unsafe {
+        HAL_PWREx_EnterSHUTDOWNMode();
+    }
+
+    cortex_m::asm::udf(); //panic
+}

semestralka_2_uart/src/sleep/sleep.rs

@@ -0,0 +1,19 @@
+// src/sleep/sleep.rs
+
+use cortex_m::Peripherals;
+
+#[derive(Clone, Copy, Debug, defmt::Format)]
+pub enum SleepEntry {
+    Wfi,
+    Wfe,
+}
+
+pub fn enter_sleep_mode(entry: SleepEntry) {
+    let mut core = unsafe { Peripherals::steal() };
+    core.SCB.clear_sleepdeep();
+
+    match entry {
+        SleepEntry::Wfi => cortex_m::asm::wfi(),
+        SleepEntry::Wfe => cortex_m::asm::wfe(),
+    }
+}

semestralka_2_uart/src/sleep/standby.rs

@@ -0,0 +1,58 @@
+// src/sleep/standby.rs
+
+pub fn enter_standby() -> ! {
+    unsafe extern "C" {
+        fn HAL_PWR_EnterSTANDBYMode();
+    }
+    
+    unsafe {
+        HAL_PWR_EnterSTANDBYMode();
+    }
+    
+    cortex_m::asm::udf();
+}
+
+pub fn enter_standby_with_sram2_8kb() -> ! {
+    sram2_8kb_retention();
+    enter_standby();
+}
+
+pub fn enter_standby_with_sram2_full() -> ! {
+    sram2_full_retention();
+    enter_standby();
+}
+
+pub fn sram2_full_retention() {
+    unsafe extern "C" {
+        fn HAL_PWREx_EnableSRAM2ContentStandbyRetention(sram2_pages: u32);
+    }
+
+    unsafe {
+        // 0x60 = PWR_SRAM2_FULL_STANDBY = PWR_CR1_RRSB1 | PWR_CR1_RRSB2
+        // See: STM32U5xx HAL: stm32u5xx_hal_pwr_ex.h line 227
+        // PWR_CR1_RRSB1=0x20, PWR_CR1_RRSB2=0x40
+        HAL_PWREx_EnableSRAM2ContentStandbyRetention(0x60);
+    }
+}
+
+pub fn sram2_8kb_retention() {
+    unsafe extern "C" {
+        fn HAL_PWREx_EnableSRAM2ContentStandbyRetention(sram2_pages: u32);
+    }
+
+    unsafe {
+        // 0x40 = PWR_SRAM2_PAGE1_STANDBY = PWR_CR1_RRSB2
+        // 8KB retention only
+        HAL_PWREx_EnableSRAM2ContentStandbyRetention(0x40);
+    }
+}
+
+pub fn disable_sram2_full_retention() {
+    unsafe extern "C" {
+        fn HAL_PWREx_DisableSRAM2ContentStandbyRetention(sram2_pages: u32);
+    }
+
+    unsafe {
+        HAL_PWREx_DisableSRAM2ContentStandbyRetention(0x60);
+    }
+}

semestralka_2_uart/src/sleep/stop.rs

@@ -0,0 +1,69 @@
+// src/sleep/stop.rs
+
+use cortex_m::Peripherals;
+use cortex_m::asm;
+
+/// Enter STOPx mode parameter
+#[derive(Debug, Clone, Copy, PartialEq, Eq, defmt::Format)]
+pub enum StopEntry {
+    Wfi,
+    Wfe,
+    WfeNoEventClear,
+}
+
+impl From<StopEntry> for u8 {
+    fn from(value: StopEntry) -> Self {
+        match value {
+            StopEntry::Wfi => 0x01,
+            StopEntry::Wfe => 0x02,
+            StopEntry::WfeNoEventClear => 0x03,
+        }
+    }
+}
+
+pub fn enter_stop0() {
+    unsafe extern "C" {
+        fn rust_LL_PWR_SetPowerMode(mode: u32);
+    }
+
+    const LL_PWR_STOP0_MODE: u32 = 0; //stm32u5xx_ll_pwr.h
+
+    unsafe {
+        rust_LL_PWR_SetPowerMode(LL_PWR_STOP0_MODE);
+
+        let mut core = Peripherals::steal();
+        core.SCB.set_sleepdeep();
+        asm::wfi();
+        core.SCB.clear_sleepdeep();
+    }
+}
+
+pub fn enter_stop1(entry: StopEntry) {
+    unsafe extern "C" {
+        fn HAL_PWREx_EnterSTOP1Mode(entry: u8);
+    }
+
+    unsafe {
+        HAL_PWREx_EnterSTOP1Mode(entry.into());
+    }
+}
+
+pub fn enter_stop2(entry: StopEntry) {
+    unsafe extern "C" {
+        fn HAL_PWREx_EnterSTOP2Mode(entry: u8);
+    }
+
+    unsafe {
+        HAL_PWREx_EnterSTOP2Mode(entry.into());
+    }
+}
+
+pub fn enter_stop3(entry: StopEntry) {
+    unsafe extern "C" {
+        fn HAL_PWREx_EnterSTOP3Mode(entry: u8);
+    }
+
+    unsafe {
+        HAL_PWREx_EnterSTOP3Mode(entry.into());
+    }
+}

semestralka_2_uart/src/wakeup/gpio.rs

@@ -0,0 +1,25 @@
+// src/wakeup/gpio.rs
+
+use defmt::info;
+use embassy_stm32::exti::ExtiInput;
+use embassy_stm32::gpio::Pull;
+use embassy_stm32::peripherals;
+use embassy_time::{Duration, Timer};
+use embassy_hal_internal::Peri;
+
+/// GPIO pin as an EXTI wake-up source.
+#[embassy_executor::task]
+pub async fn gpio_wakeup(
+    pin: Peri<'static, peripherals::PA0>,
+    ch: Peri<'static, peripherals::EXTI0>
+) {
+    info!("EXTI wake input on PA0");
+    let mut btn = ExtiInput::new(pin, ch, Pull::Up);
+
+    loop {
+        info!("Waiting for falling edge on PA0");
+        btn.wait_for_falling_edge().await;
+        info!("GPIO wake-up");
+        Timer::after(Duration::from_millis(50)).await;
+    }
+}

semestralka_2_uart/src/wakeup/iwdg.rs

@@ -0,0 +1,42 @@
+// src/wakeup/iwdg.rs
+
+use defmt::info;
+use embassy_stm32::peripherals;
+use embassy_stm32::wdg::IndependentWatchdog;
+use embassy_stm32::Peri;
+use embassy_time::{Duration, Timer};
+use embassy_stm32::pac;
+use crate::sleep::standby;
+
+use crate::config::WATCHDOG_TIMEOUT_US;
+
+/// Call early in startup 
+///
+/// - `RCC_CSR` — Reset and Clock Control / Status
+/// - `PWR_SR` — Power Control / Status
+pub fn clear_wakeup_flags() {
+    info!("Clearing wakeup flags...");
+    standby::disable_sram2_full_retention();
+
+    // Clear reset flags
+    // let rcc = unsafe { &*pac::RCC::ptr() };
+    let rcc = pac::RCC;
+    rcc.csr().write(|w| w.set_rmvf(true));
+
+    // Check and clear Standby wakeup flag
+    // let pwr = unsafe { &*pac::PWR::ptr() };
+    let pwr = pac::PWR;
+    if pwr.sr().read().sbf() {
+        info!("Woke from Standby mode");
+        pwr.sr().write(|w| w.set_sbf(true));
+    }
+}
+
+/// Init Independent Watchdog (IWDG) timer.
+/// Timeout value is configured in `WATCHDOG_TIMEOUT_US` from config.rs
+pub async fn init_watchdog_reset(iwdg: Peri<'static, peripherals::IWDG>) {
+    info!("Init watchdog after watchdog wake...");
+    let mut watchdog = IndependentWatchdog::new(iwdg, WATCHDOG_TIMEOUT_US);
+    watchdog.unleash();
+    Timer::after(Duration::from_millis(10)).await;
+}

semestralka_2_uart/src/wakeup/mod.rs

@@ -0,0 +1,4 @@
+// src/wakeup/mod.rs
+
+pub mod iwdg;
+pub mod gpio;

semestralka_2_uart/tests/uart_emulation.rs

@@ -0,0 +1,41 @@
+#![no_std]
+#![no_main]
+
+use dma_gpio as _;
+use panic_probe as _;
+use defmt_rtt as _;
+
+#[defmt_test::tests]
+mod tests {
+    use defmt::assert_eq;
+    use dma_gpio::software_uart::uart_emulation::{
+        encode_uart_byte_cfg, UartConfig, Parity, StopBits
+    };
+
+    const TX_PIN_BIT: u8 = 2;
+
+    #[test]
+    fn test_encode_8n1() {
+        let cfg = UartConfig::default();
+        let mut frame = [0u32; 12];
+        let used = encode_uart_byte_cfg(TX_PIN_BIT, 0x55, &cfg, &mut frame);
+        
+        assert_eq!(used, 10);
+        assert_eq!(frame[0], 1u32 << 18); // Start LOW
+        assert_eq!(frame[9], 1u32 << 2);  // Stop HIGH
+    }
+
+    #[test]
+    fn test_encode_parity() {
+        let cfg = UartConfig {
+            data_bits: 8,
+            parity: Parity::Even,
+            stop_bits: StopBits::One,
+        };
+        
+        let mut frame = [0u32; 12];
+        let used = encode_uart_byte_cfg(TX_PIN_BIT, 0x00, &cfg, &mut frame);
+        
+        assert_eq!(used, 11);
+    }
+}