comment

dma_gpio/src/bin/main.rs

@@ -61,7 +61,7 @@ async fn main(spawner: Spawner) {
     tx_opts.half_transfer_ir = true;
     tx_opts.complete_transfer_ir = true;
 
-    // SAFETY: tx_ring_mem is exclusive, bsrr_ptr points to GPIOA BSRR, paced by TIM6.
+    // SAFETY: tx_ring_mem is exclusive
     let mut tx_ring = unsafe {
         WritableRingBuffer::new(
             p.GPDMA1_CH0,
@@ -71,6 +71,7 @@ async fn main(spawner: Spawner) {
             tx_opts,
         )
     };
+    // Start DMA
     tx_ring.start();
     info!("TX DMA ring started");