95 lines
2.8 KiB
Rust
95 lines
2.8 KiB
Rust
// src/bin/main.rs
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#![no_std]
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#![no_main]
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use defmt::*;
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use embassy_executor::Spawner;
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use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
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use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
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use embassy_time::{Duration, Timer};
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use dma_gpio::software_uart::{
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dma_timer::{init_tim6_for_uart, init_tim7_for_uart},
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uart_emulation::{Parity, StopBits, UartConfig},
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gpio_dma_uart_tx::{write_uart_frames_to_ring, TIM6_UP_REQ},
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gpio_dma_uart_rx::rx_dma_task,
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debug::dump_tim6_regs,
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};
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use embassy_stm32::dma::{TransferOptions, WritableRingBuffer};
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use static_cell::StaticCell;
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use {defmt_rtt as _, panic_probe as _};
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/// SOFTWARE UART CONFIGURATION
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const BAUD: u32 = 115_200;
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const TX_PIN_BIT: u8 = 2; // PA2
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const TX_OVERSAMPLE: u16 = 1;
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const RX_OVERSAMPLE: u16 = 16;
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const RX_RING_BYTES: usize = 4096;
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const TX_RING_BYTES: usize = 4096;
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// Nemoze by generic, v taskoch treba manualne zmenit
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// Compiler upozorni, takze ostava takto
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const PIPE_RX_SIZE: usize = 256;
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static PIPE_RX: Pipe<CriticalSectionRawMutex, PIPE_RX_SIZE> = Pipe::new();
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static RX_RING: StaticCell<[u8; RX_RING_BYTES]> = StaticCell::new();
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static TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
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#[embassy_executor::main]
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async fn main(spawner: Spawner) {
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let p = embassy_stm32::init(Default::default());
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info!("Hehe");
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let _rx = Input::new(p.PA3, Pull::Up);
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let _tx = Output::new(p.PA2, Level::High, Speed::VeryHigh);
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init_tim6_for_uart(p.TIM6, BAUD, TX_OVERSAMPLE);
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init_tim7_for_uart(p.TIM7, BAUD, RX_OVERSAMPLE);
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dump_tim6_regs();
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// Safe one-time init from StaticCell
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let rx_ring: &mut [u8; RX_RING_BYTES] = RX_RING.init([0; RX_RING_BYTES]);
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let tx_ring_mem: &mut [u32; TX_RING_BYTES] =
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TX_RING.init([0; TX_RING_BYTES]);
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// Spawn tasks
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spawner.spawn(rx_dma_task(p.GPDMA1_CH1, &PIPE_RX, rx_ring).unwrap());
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// Create and start the TX DMA ring in main.
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let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
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let mut tx_opts = TransferOptions::default();
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tx_opts.half_transfer_ir = true;
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tx_opts.complete_transfer_ir = true;
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// SAFETY: tx_ring_mem is exclusive
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let mut tx_ring = unsafe {
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WritableRingBuffer::new(
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p.GPDMA1_CH0,
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TIM6_UP_REQ,
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bsrr_ptr,
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tx_ring_mem,
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tx_opts,
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)
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};
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// Start DMA
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tx_ring.start();
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info!("TX DMA ring started");
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let uart_cfg = UartConfig {
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data_bits: 8,
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parity: Parity::None,
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stop_bits: StopBits::One,
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};
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loop {
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write_uart_frames_to_ring(
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&mut tx_ring,
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TX_PIN_BIT,
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b"Hello marshmallow\r\n",
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&uart_cfg,
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)
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.await;
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Timer::after(Duration::from_secs(2)).await;
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}
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}
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