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Priec
2025-11-11 23:34:48 +01:00
parent a35d1df67f
commit 2a97cbbd38
1 changed files with 3 additions and 3 deletions
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6
semestralka_1/src/bin/main.rs
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@@ -66,9 +66,9 @@ async fn main(spawner: Spawner) {
dump_tim6_regs(); dump_tim6_regs();
// Safe one-time init from StaticCell // Safe one-time init from StaticCell
let sw_rx_ring: &mut [u8; RX_RING_BYTES] = SW_RING_RX.init([0; RX_RING_BYTES]); let sw_rx_ring: &mut [u8; RX_RING_BYTES] = SW_RX_RING.init([0; RX_RING_BYTES]);
let sw_tx_ring: &mut [u32; TX_RING_BYTES] = SW_RING_TX.init([0; TX_RING_BYTES]); let sw_tx_ring: &mut [u32; TX_RING_BYTES] = SW_TX_RING.init([0; TX_RING_BYTES]);
spawner.spawn(rx_dma_task(p.GPDMA1_CH1, rx_ring, &PIPE_SW_RX).unwrap()); spawner.spawn(rx_dma_task(p.GPDMA1_CH1, sw_rx_ring, &PIPE_SW_RX).unwrap());
// Create and start the TX DMA ring in main. // Create and start the TX DMA ring in main.
// let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32; // let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;