filipriec/stm32_rust
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

debugging more

Browse Source
This commit is contained in:
Filipriec
2025-11-18 16:55:42 +01:00
parent 1909497403
commit 0a0ff0f38a
58 changed files with 5642 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
semestralka_1d_rx_bez_dma/src/bin/main.rs
View File

@@ -47,7 +47,6 @@ async fn main(spawner: Spawner) {
info!("boot");
let p = embassy_stm32::init(Default::default());
info!("init m8");
// HARDWARE UART to the PC
let mut cfg = Config::default();
cfg.baudrate = BAUD;
@@ -66,6 +65,8 @@ async fn main(spawner: Spawner) {
spawner.spawn(uart_task(uart, &PIPE_HW_TX, &PIPE_HW_RX).unwrap());
// END OF HARDWARE UART to the PC
// INTERNAL HARDWARE UART (USART2)
let mut cfg2 = Config::default();
cfg2.baudrate = BAUD;
@@ -81,7 +82,6 @@ async fn main(spawner: Spawner) {
Irqs2,
cfg2,
).unwrap();
let _ = usart2::setup_and_spawn(BAUD);
spawner.spawn(uart_task_internal(uart2, &PIPE_INT_TX, &PIPE_INT_RX).unwrap());
info!("USART2 ready");
@@ -93,47 +93,37 @@ async fn main(spawner: Spawner) {
info!("USART1 <-> USART2 bridge active");
// END OF USART1 <-> USART2 bridge
// SOFTWARE UART
// let _rx = Input::new(p.PD6, Pull::Up);
let rx_pin = Input::new(p.PD6, Pull::Up);
let _tx = Output::new(p.PB0, Level::High, Speed::VeryHigh);
// let tx_pin = Output::new(p.PB0, Level::High, Speed::VeryHigh);
init_tim6_for_uart(p.TIM6, BAUD, TX_OVERSAMPLE);
init_tim7_for_uart(p.TIM7, BAUD, RX_OVERSAMPLE);
dump_tim6_regs();
// EDN OF SOFTWARE UART
let mut last_yield = Instant::now();
let mut buf = [0u8; 32];
let mut last_state: u8 = 0;
loop {
info!("tick start");
// Timer::after(Duration::from_millis(100)).await;
// info!("tick end");
// let n1 = PIPE_HW_RX.read(&mut buf).await;
// if n1 > 0 {
// info!("PC received: {:a}", &buf[..n1]);
// let _ = PIPE_SW_TX.write(&buf[..n1]).await;
// info!("SW UART TX sent echo: {:a}", &buf[..n1]);
// }
// yield_now().await;
// RX pin should be READ in here and print via info!
//
let bit = rx_pin.is_high();
info!("Rx_pin read (high): {}", bit);
if bit as u8 != last_state {
info!(
"SW RX -> PD6 changed, new state = {}",
if bit { "HIGH" } else { "LOW" }
);
last_state = bit as u8;
continue;
yield_now().await;
}
Timer::after(Duration::from_millis(1)).await;
let n2 = PIPE_SW_RX.read(&mut buf).await;
if n2 > 0 {
info!("SW UART RX pipe: {:a}", &buf[..n2]);
}
yield_now().await;
}
}
@@ -150,6 +140,7 @@ pub async fn bridge_usart1_rx_to_usart2_tx(
let _ = usart2_tx.write(&buf[..n]).await;
info!("bridge: USART1 -> USART2 sent {} bytes", n);
}
yield_now().await;
}
}
@@ -165,5 +156,6 @@ pub async fn bridge_usart2_rx_to_usart1_tx(
let _ = usart1_tx.write(&buf[..n]).await;
info!("bridge: USART2 -> USART1 sent {} bytes", n);
}
yield_now().await;
}
}

2
semestralka_1d_rx_bez_dma/src/config.rs
View File

@@ -3,7 +3,7 @@ use crate::software_uart::uart_emulation::{Parity, StopBits, UartConfig};
use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
use embassy_sync::pipe::Pipe;
pub const BAUD: u32 = 9_600;
pub const BAUD: u32 = 115_200;
// pub const TX_PIN_BIT: u8 = 2; // PA2
// pub const RX_PIN_BIT: u8 = 3; // PA3
pub const TX_PIN_BIT: u8 = 0; // PB2

2
semestralka_1d_rx_bez_dma/src/hw_uart_internal/driver.rs
View File

@@ -6,6 +6,7 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
use embassy_sync::pipe::Pipe;
use embedded_io_async::{Read, Write};
use crate::hw_uart_pc::safety::{RX_PIPE_CAP, TX_PIPE_CAP};
use embassy_futures::yield_now;
#[embassy_executor::task]
pub async fn uart_task(
@@ -35,5 +36,6 @@ pub async fn uart_task(
unwrap!(uart.write(&tx_buf[..n]).await);
}
}
yield_now().await;
}
}

2
semestralka_1d_rx_bez_dma/src/hw_uart_pc/driver.rs
View File

@@ -6,6 +6,7 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
use embassy_sync::pipe::Pipe;
use embedded_io_async::{Read, Write};
use crate::hw_uart_pc::safety::{RX_PIPE_CAP, TX_PIPE_CAP};
use embassy_futures::yield_now;
#[embassy_executor::task]
pub async fn uart_task(
@@ -35,5 +36,6 @@ pub async fn uart_task(
unwrap!(uart.write(&tx_buf[..n]).await);
}
}
yield_now().await;
}
}