filipriec/stm32_rust
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there is some bug

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This commit is contained in:
Priec
2025-11-12 16:07:59 +01:00
parent 829cff872f
commit 05662a45d0
9 changed files with 120 additions and 29 deletions
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9
semestralka_1/src/bin/main.rs
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@@ -73,9 +73,9 @@ async fn main(spawner: Spawner) {
spawner.spawn(rx_dma_task(p.GPDMA1_CH1, sw_rx_ring, &PIPE_SW_RX).unwrap());
// Create and start the TX DMA ring in main.
// let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, sw_tx_ring, &PIPE_SW_TX).unwrap());
let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
// let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32; // NEEDS DECODE CHANGE
spawner.spawn(tx_dma_task(p.GPDMA1_CH0, bsrr_ptr, sw_tx_ring, &PIPE_SW_TX).unwrap());
// EDN OF SOFTWARE UART
@@ -95,11 +95,10 @@ async fn main(spawner: Spawner) {
let n1 = PIPE_HW_RX.read(&mut buf).await;
if n1 > 0 {
info!("PC received: {:a}", &buf[..n1]);
}
if n1 > 0 {
let _ = PIPE_SW_TX.write(&buf[..n1]).await;
info!("SW UART TX sent echo: {:a}", &buf[..n1]);
}
yield_now().await;
let n2 = PIPE_SW_RX.read(&mut buf).await;
if n2 > 0 {