From 05662a45d05005b0682d6347d13964d8e70fe119 Mon Sep 17 00:00:00 2001 From: Priec Date: Wed, 12 Nov 2025 16:07:59 +0100 Subject: [PATCH] there is some bug --- semestralka_1/Cargo.lock | 33 +++++++++++++++ semestralka_1/Cargo.toml | 15 +++++++ semestralka_1/src/bin/main.rs | 9 ++-- semestralka_1/src/config.rs | 3 +- .../src/software_uart/gpio_dma_uart_rx.rs | 23 +++++++++-- .../src/software_uart/gpio_dma_uart_tx.rs | 5 ++- .../src/software_uart/uart_emulation.rs | 4 +- semestralka_1/tests/integration.rs | 16 -------- semestralka_1/tests/uart_emulation.rs | 41 +++++++++++++++++++ 9 files changed, 120 insertions(+), 29 deletions(-) delete mode 100644 semestralka_1/tests/integration.rs create mode 100644 semestralka_1/tests/uart_emulation.rs diff --git a/semestralka_1/Cargo.lock b/semestralka_1/Cargo.lock index 1a76b46..0556be2 100644 --- a/semestralka_1/Cargo.lock +++ b/semestralka_1/Cargo.lock @@ -166,6 +166,15 @@ dependencies = [ "syn 2.0.107", ] +[[package]] +name = "cortex-m-semihosting" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c23234600452033cc77e4b761e740e02d2c4168e11dbf36ab14a0f58973592b0" +dependencies = [ + "cortex-m", +] + [[package]] name = "critical-section" version = "1.2.0" @@ -258,6 +267,29 @@ dependencies = [ "defmt 1.0.1", ] +[[package]] +name = "defmt-test" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "24076cc7203c365e7febfcec15d6667a9ef780bd2c5fd3b2a197400df78f299b" +dependencies = [ + "cortex-m-rt", + "cortex-m-semihosting", + "defmt 1.0.1", + "defmt-test-macros", +] + +[[package]] +name = "defmt-test-macros" +version = "0.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fe5520fd36862f281c026abeaab153ebbc001717c29a9b8e5ba9704d8f3a879d" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.107", +] + [[package]] name = "dma_gpio" version = "0.1.0" @@ -266,6 +298,7 @@ dependencies = [ "cortex-m-rt", "defmt 1.0.1", "defmt-rtt", + "defmt-test", "embassy-executor", "embassy-futures", "embassy-hal-internal", diff --git a/semestralka_1/Cargo.toml b/semestralka_1/Cargo.toml index 3cd0da2..8a6d4b1 100644 --- a/semestralka_1/Cargo.toml +++ b/semestralka_1/Cargo.toml @@ -29,3 +29,18 @@ defmt = "1.0.1" static_cell = "2.1.1" embedded-io = "0.6.1" embedded-io-async = "0.6.1" + +[dev-dependencies] +defmt-test = "0.4.0" + +[[test]] +name = "uart_emulation" +harness = false + +[lib] +test = false + +[[bin]] +name = "main" +path = "src/bin/main.rs" +test = false diff --git a/semestralka_1/src/bin/main.rs b/semestralka_1/src/bin/main.rs index 0368d76..44a6b89 100644 --- a/semestralka_1/src/bin/main.rs +++ b/semestralka_1/src/bin/main.rs @@ -73,9 +73,9 @@ async fn main(spawner: Spawner) { spawner.spawn(rx_dma_task(p.GPDMA1_CH1, sw_rx_ring, &PIPE_SW_RX).unwrap()); // Create and start the TX DMA ring in main. - // let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32; - let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32; - spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, sw_tx_ring, &PIPE_SW_TX).unwrap()); + let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32; + // let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32; // NEEDS DECODE CHANGE + spawner.spawn(tx_dma_task(p.GPDMA1_CH0, bsrr_ptr, sw_tx_ring, &PIPE_SW_TX).unwrap()); // EDN OF SOFTWARE UART @@ -95,11 +95,10 @@ async fn main(spawner: Spawner) { let n1 = PIPE_HW_RX.read(&mut buf).await; if n1 > 0 { info!("PC received: {:a}", &buf[..n1]); - } - if n1 > 0 { let _ = PIPE_SW_TX.write(&buf[..n1]).await; info!("SW UART TX sent echo: {:a}", &buf[..n1]); } + yield_now().await; let n2 = PIPE_SW_RX.read(&mut buf).await; if n2 > 0 { diff --git a/semestralka_1/src/config.rs b/semestralka_1/src/config.rs index 42f2621..733927d 100644 --- a/semestralka_1/src/config.rs +++ b/semestralka_1/src/config.rs @@ -3,8 +3,9 @@ use crate::software_uart::uart_emulation::{Parity, StopBits, UartConfig}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::pipe::Pipe; -pub const BAUD: u32 = 115_200; +pub const BAUD: u32 = 9_600; pub const TX_PIN_BIT: u8 = 2; // PA2 +pub const RX_PIN_BIT: u8 = 3; // PA3 pub const TX_OVERSAMPLE: u16 = 1; pub const RX_OVERSAMPLE: u16 = 16; diff --git a/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs b/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs index 92fe66f..b5c2daa 100644 --- a/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs +++ b/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs @@ -5,6 +5,7 @@ use embassy_stm32::{ peripherals::GPDMA1_CH1, Peri, }; +use crate::config::RX_PIN_BIT; use embassy_stm32::dma::{ ReadableRingBuffer, TransferOptions, @@ -13,6 +14,7 @@ use crate::config::{RX_OVERSAMPLE, UART_CFG}; use crate::software_uart::decode_uart_samples; use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe}; use embassy_futures::yield_now; +use defmt::info; // datasheet tabulka 137 pub const TIM7_UP_REQ: Request = 5; @@ -34,10 +36,25 @@ pub async fn rx_dma_task( let mut rx = unsafe { ReadableRingBuffer::new(ch, TIM7_UP_REQ, gpioa_idr, ring, opts) }; rx.start(); - let mut chunk = [0u8; 256]; + let mut raw_chunk = [0u8; 256]; + let mut levels = [0u8; 256]; loop { - let _ = rx.read_exact(&mut chunk).await; - let decoded = decode_uart_samples(&chunk, RX_OVERSAMPLE, &UART_CFG); + info!("rx_dma_task waiting for DMA data..."); + let _ = rx.read_exact(&mut raw_chunk).await; + + for (i, b) in raw_chunk.iter().enumerate() { + levels[i] = ((*b >> RX_PIN_BIT) & 1) as u8; + } + + let decoded = decode_uart_samples(&levels, RX_OVERSAMPLE, &UART_CFG); + if !decoded.is_empty() { + info!("SW RX raw samples (first 32): {:a}", &levels[..32]); + info!( + "SW RX decoded {} bytes: {:a}", + decoded.len(), + decoded.as_slice() + ); + } pipe_rx.write(&decoded).await; yield_now().await; } diff --git a/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs b/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs index e550afa..d995156 100644 --- a/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs +++ b/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs @@ -42,7 +42,7 @@ pub async fn encode_uart_frames<'a>( #[task] pub async fn tx_dma_task( ch: Peri<'static, GPDMA1_CH0>, - odr_ptr: *mut u32, + register: *mut u32, // Either odr or bsrr tx_ring_mem: &'static mut [u32], pipe_rx: &'static Pipe, ) { @@ -55,7 +55,7 @@ pub async fn tx_dma_task( WritableRingBuffer::new( ch, TIM6_UP_REQ, - odr_ptr, + register, tx_ring_mem, tx_opts, ) @@ -78,6 +78,7 @@ pub async fn tx_dma_task( if used > 0 { let _ = tx_ring.write_exact(&frame_buf[..used]).await; } + info!("tx_dma_task wrote {} words", used); yield_now().await; } } diff --git a/semestralka_1/src/software_uart/uart_emulation.rs b/semestralka_1/src/software_uart/uart_emulation.rs index 8d677e5..d463849 100644 --- a/semestralka_1/src/software_uart/uart_emulation.rs +++ b/semestralka_1/src/software_uart/uart_emulation.rs @@ -40,8 +40,8 @@ pub fn encode_uart_byte_cfg( ) -> usize { // GPIOx_BSRR register str. 636 kap. 13.4.7 let set_high = |bit: u8| -> u32 { 1u32 << bit }; - let set_low = |bit: u8| -> u32 { 0 }; - // let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) }; + // let set_low = |bit: u8| -> u32 { 0 }; // ODR + let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) }; // BSRR let mut idx = 0usize; diff --git a/semestralka_1/tests/integration.rs b/semestralka_1/tests/integration.rs deleted file mode 100644 index 1f33de6..0000000 --- a/semestralka_1/tests/integration.rs +++ /dev/null @@ -1,16 +0,0 @@ -#![no_std] -#![no_main] - -use stm32u5_blinky as _; // memory layout + panic handler - -// See https://crates.io/crates/defmt-test/0.3.0 for more documentation (e.g. about the 'state' -// feature) -#[defmt_test::tests] -mod tests { - use defmt::assert; - - #[test] - fn it_works() { - assert!(true) - } -} diff --git a/semestralka_1/tests/uart_emulation.rs b/semestralka_1/tests/uart_emulation.rs new file mode 100644 index 0000000..bd97082 --- /dev/null +++ b/semestralka_1/tests/uart_emulation.rs @@ -0,0 +1,41 @@ +#![no_std] +#![no_main] + +use dma_gpio as _; +use panic_probe as _; +use defmt_rtt as _; + +#[defmt_test::tests] +mod tests { + use defmt::assert_eq; + use dma_gpio::software_uart::uart_emulation::{ + encode_uart_byte_cfg, UartConfig, Parity, StopBits + }; + + const TX_PIN_BIT: u8 = 2; + + #[test] + fn test_encode_8n1() { + let cfg = UartConfig::default(); + let mut frame = [0u32; 12]; + let used = encode_uart_byte_cfg(TX_PIN_BIT, 0x55, &cfg, &mut frame); + + assert_eq!(used, 10); + assert_eq!(frame[0], 1u32 << 18); // Start LOW + assert_eq!(frame[9], 1u32 << 2); // Stop HIGH + } + + #[test] + fn test_encode_parity() { + let cfg = UartConfig { + data_bits: 8, + parity: Parity::Even, + stop_bits: StopBits::One, + }; + + let mut frame = [0u32; 12]; + let used = encode_uart_byte_cfg(TX_PIN_BIT, 0x00, &cfg, &mut frame); + + assert_eq!(used, 11); + } +}