working scheduler

2025-12-04 12:13:54 +01:00
parent 86fbd00c53
commit a78a53bebd
7 changed files with 384 additions and 8 deletions
--- a/blinky/.cargo/config.toml
+++ b/blinky/.cargo/config.toml
@@ -0,0 +1,5 @@
+[target.thumbv7em-none-eabihf]
+rustflags = ["-C", "link-arg=-Tlink.x"]
+
+[build]
+target = "thumbv7em-none-eabihf"
--- a/blinky/.gitignore
+++ b/blinky/.gitignore
@@ -0,0 +1 @@
+target/
--- a/blinky/Cargo.lock
+++ b/blinky/Cargo.lock
@@ -0,0 +1,240 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 4
+
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+]
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+]
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+dependencies = [
+ "bare-metal",
+ "bitfield",
+ "embedded-hal 0.2.7",
+ "volatile-register",
+]
+
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+ "quote",
+ "syn",
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+ "void",
+]
+
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+[[package]]
+name = "scheduler"
+version = "0.1.0"
+dependencies = [
+ "cortex-m",
+ "cortex-m-rt",
+ "embedded-hal 1.0.0",
+ "panic-halt",
+ "tm4c123x-hal",
+]
+
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+ "unicode-ident",
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+ "nb 1.1.0",
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+dependencies = [
+ "cortex-m",
+ "cortex-m-rt",
+ "vcell",
+]
+
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+name = "tm4c123x-hal"
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+ "cast",
+ "cortex-m",
+ "embedded-hal 0.2.7",
+ "nb 1.1.0",
+ "tm4c-hal",
+ "tm4c123x",
+ "void",
+]
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+dependencies = [
+ "vcell",
+]
--- a/blinky/Cargo.toml
+++ b/blinky/Cargo.toml
@@ -0,0 +1,11 @@
+[package]
+name = "scheduler"
+version = "0.1.0"
+edition = "2024"
+
+[dependencies]
+cortex-m = "0.7.7"
+cortex-m-rt = "0.7.3"
+embedded-hal = "1.0.0"
+panic-halt = "0.2.0"
+tm4c123x-hal = { version = "0.10.1", features = ["rt"] }
--- a/blinky/memory.x
+++ b/blinky/memory.x
@@ -0,0 +1,5 @@
+MEMORY
+{
+  FLASH : ORIGIN = 0x00000000, LENGTH = 256K
+  RAM : ORIGIN = 0x20000000, LENGTH = 32K
+}
--- a/blinky/src/main.rs
+++ b/blinky/src/main.rs
@@ -0,0 +1,35 @@
+#![no_std]
+#![no_main]
+
+use cortex_m_rt::entry;
+use panic_halt as _;
+use tm4c123x_hal::{Peripherals, prelude::*};
+use tm4c123x_hal::tm4c123x as _;
+use embedded_hal::digital::OutputPin;
+use core::sync::atomic::{AtomicU32, Ordering};
+
+static SYS_TICKS: AtomicU32 = AtomicU32::new(0);
+
+#[cortex_m_rt::exception]
+fn SysTick() {
+    SYS_TICKS.fetch_add(1, Ordering::Relaxed);
+}
+
+fn millis() -> u32 {
+    SYS_TICKS.load(Ordering::Relaxed)
+}
+
+#[entry]
+fn main() -> ! {
+    let p = Peripherals::take().unwrap();
+    let mut sc = p.SYSCTL.constrain();
+    let ports = p.GPIO_PORTF.split(&sc.power_control);
+    let mut led = ports.pf1.into_push_pull_output();
+
+    loop {
+        led.set_high();
+        cortex_m::asm::delay(1_000_000); // ~0.5 s @ 16 MHz
+        led.set_low();
+        cortex_m::asm::delay(1_000_000); // ~0.5 s
+    }
+}
--- a/scheduler/src/main.rs
+++ b/scheduler/src/main.rs
@@ -1,23 +1,102 @@
 #![no_std]
 #![no_main]

+use cortex_m::peripheral::syst::SystClkSource;
 use cortex_m_rt::entry;
 use panic_halt as _;
 use tm4c123x_hal::{Peripherals, prelude::*};
-use tm4c123x_hal::tm4c123x as _;
-use embedded_hal::digital::OutputPin;
+use core::sync::atomic::{AtomicU32, Ordering};
+
+static SYS_TICKS: AtomicU32 = AtomicU32::new(0);
+
+#[cortex_m_rt::exception]
+fn SysTick() {
+    SYS_TICKS.fetch_add(1, Ordering::Relaxed);
+}
+
+fn millis() -> u32 {
+    SYS_TICKS.load(Ordering::Relaxed)
+}
+
+fn busy_delay(ms: u32) {
+    let start = millis();
+    while millis() - start < ms {}
+}
+
+fn task1() { busy_delay(10_000); }
+fn task2() { busy_delay(10_000); }
+fn task3() { busy_delay(10_000); }
+fn task4() { busy_delay(10_000); }
+fn opt1() { busy_delay(3_000); }
+fn opt2() { busy_delay(4_000); }
+
+struct Task {
+    name: &'static str,
+    duration_ms: u32,
+    active: bool,
+    func: fn(),
+}
+
+static TASKS_MAIN: [Task; 4] = [
+    Task { name: "T1", duration_ms: 10_000, active: true, func: task1 },
+    Task { name: "T2", duration_ms: 10_000, active: true, func: task2 },
+    Task { name: "T3", duration_ms: 10_000, active: true, func: task3 },
+    Task { name: "T4", duration_ms: 10_000, active: true, func: task4 },
+];
+
+static TASKS_OPT: [Task; 2] = [
+    Task { name: "Opt1", duration_ms: 3_000, active: true, func: opt1 },
+    Task { name: "Opt2", duration_ms: 4_000, active: true, func: opt2 },
+];
+
+const MAJOR_FRAME_MS: u32 = 120_000;
+
+fn run_optionals(tasks: &[Task], mut remaining: u32) {
+    for t in tasks {
+        if t.duration_ms <= remaining {
+            (t.func)();
+            remaining -= t.duration_ms;
+        } else {
+            break;
+        }
+    }
+}
+
+fn scheduler(tasks_main: &[Task], tasks_optional: &[Task]) {
+    let start_time = millis();
+
+    for t in tasks_main {
+        (t.func)();
+    }
+
+    let elapsed = millis() - start_time;
+
+    if elapsed < MAJOR_FRAME_MS {
+        run_optionals(tasks_optional, MAJOR_FRAME_MS - elapsed);
+    }
+
+    // Wait out the frame so each cycle lasts exactly 120 s
+    while millis() - start_time < MAJOR_FRAME_MS {}
+}

 #[entry]
 fn main() -> ! {
+    let cp = cortex_m::Peripherals::take().unwrap();
    let p = Peripherals::take().unwrap();
+
+    // System control and clock
    let mut sc = p.SYSCTL.constrain();
-    let ports = p.GPIO_PORTF.split(&sc.power_control);
-    let mut led = ports.pf1.into_push_pull_output();
+    let clocks = sc.clock_setup.freeze(); // default 16 MHz
+
+    // SysTick 1 ms tick
+    let mut syst = cp.SYST;
+    syst.set_clock_source(SystClkSource::Core);
+    syst.set_reload(16_000 - 1); // 16 MHz / 16_000 = 1 kHz
+    syst.clear_current();
+    syst.enable_counter();
+    syst.enable_interrupt();

    loop {
-        led.set_high();
-        cortex_m::asm::delay(1_000_000); // ~0.5 s @ 16 MHz
-        led.set_low();
-        cortex_m::asm::delay(1_000_000); // ~0.5 s
+        scheduler(&TASKS_MAIN, &TASKS_OPT);
    }
 }