95 lines
2.5 KiB
VHDL
95 lines
2.5 KiB
VHDL
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-- Company:
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-- Engineer:
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--
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-- Create Date: 09.03.2026 13:07:50
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-- Design Name:
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-- Module Name: top_modul - Behavioral
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-- Project Name:
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-- Target Devices:
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-- Tool Versions:
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-- Description:
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--
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-- Dependencies:
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--
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-- Revision:
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-- Revision 0.01 - File Created
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-- Additional Comments:
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--
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----------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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-- Uncomment the following library declaration if using
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-- arithmetic functions with Signed or Unsigned values
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--use IEEE.NUMERIC_STD.ALL;
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-- Uncomment the following library declaration if instantiating
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-- any Xilinx leaf cells in this code.
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--library UNISIM;
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--use UNISIM.VComponents.all;
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entity top_modul is
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Port ( CLK : in STD_LOGIC;
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RST : in STD_LOGIC;
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START_PAUSE : in STD_LOGIC;
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LED_UNITS : out STD_LOGIC_VECTOR (3 downto 0);
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LED_TENS : out STD_LOGIC_VECTOR (3 downto 0));
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end top_modul;
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architecture Behavioral of top_modul is
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-- 1. Component Declarations
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component divider is
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Port ( CLK : in STD_LOGIC;
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RST : in STD_LOGIC;
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CLK_1_Hz : out STD_LOGIC); -- This will be our enable pulse
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end component;
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component counter is
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Port ( CLK : in STD_LOGIC;
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RST : in STD_LOGIC;
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CE : in std_logic;
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TC : out std_logic; -- Terminal Count for cascading
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COUNT_OUT : out STD_LOGIC_VECTOR (3 downto 0));
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end component;
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-- 2. Internal "Wires"
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signal s_1hz_tick : std_logic;
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signal s_tc_units : std_logic;
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begin
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-- 3. Block Instantiation & Wiring
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U_DIV : divider
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port map (
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CLK => CLK,
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RST => RST,
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CLK_1_Hz => s_1hz_tick
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);
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-- Units Counter (First CNT in diagram)
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U_CNT_UNITS : counter
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port map (
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CLK => CLK,
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RST => RST,
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CE => (s_1hz_tick and START_PAUSE), -- Input from DIV + Switch
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TC => s_tc_units, -- Output to next counter
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COUNT_OUT => LED_UNITS
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);
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-- Tens Counter (Second CNT in diagram)
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U_CNT_TENS : counter
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port map (
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CLK => CLK,
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RST => RST,
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-- Increments ONLY when Units rolls over (TC) AND 1Hz pulse is there
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CE => s_tc_units,
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TC => open, -- We don't need TC for the last digit
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COUNT_OUT => LED_TENS
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);
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end Behavioral; |