59 lines
1.3 KiB
Rust
59 lines
1.3 KiB
Rust
// src/sleep/standby.rs
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pub fn enter_standby() -> ! {
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unsafe extern "C" {
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fn HAL_PWR_EnterSTANDBYMode();
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}
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unsafe {
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HAL_PWR_EnterSTANDBYMode();
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}
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cortex_m::asm::udf(); // never happen marker
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}
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pub fn enter_standby_with_sram2_8kb() -> ! {
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sram2_8kb_retention();
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enter_standby();
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}
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pub fn enter_standby_with_sram2_full() -> ! {
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sram2_full_retention();
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enter_standby();
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}
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pub fn sram2_full_retention() {
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unsafe extern "C" {
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fn HAL_PWREx_EnableSRAM2ContentStandbyRetention(sram2_pages: u32);
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}
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unsafe {
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// 0x60 = PWR_SRAM2_FULL_STANDBY = PWR_CR1_RRSB1 | PWR_CR1_RRSB2
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// See: STM32U5xx HAL: stm32u5xx_hal_pwr_ex.h line 227
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// PWR_CR1_RRSB1=0x20, PWR_CR1_RRSB2=0x40
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HAL_PWREx_EnableSRAM2ContentStandbyRetention(0x60);
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}
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}
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pub fn sram2_8kb_retention() {
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unsafe extern "C" {
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fn HAL_PWREx_EnableSRAM2ContentStandbyRetention(sram2_pages: u32);
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}
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unsafe {
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// 0x40 = PWR_SRAM2_PAGE1_STANDBY = PWR_CR1_RRSB2
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// 8KB retention only
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HAL_PWREx_EnableSRAM2ContentStandbyRetention(0x40);
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}
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}
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pub fn disable_sram2_full_retention() {
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unsafe extern "C" {
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fn HAL_PWREx_DisableSRAM2ContentStandbyRetention(sram2_pages: u32);
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}
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unsafe {
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HAL_PWREx_DisableSRAM2ContentStandbyRetention(0x60);
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}
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}
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