152 lines
3.8 KiB
Rust
152 lines
3.8 KiB
Rust
// src/software_uart/uart_emulation.rs
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use heapless::Vec;
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum Parity {
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None,
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Even,
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Odd,
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}
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum StopBits {
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One,
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Two,
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}
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#[derive(Clone, Copy, Debug)]
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pub struct UartConfig {
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pub data_bits: u8,
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pub parity: Parity,
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pub stop_bits: StopBits,
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}
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impl Default for UartConfig {
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fn default() -> Self {
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Self {
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data_bits: 8,
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parity: Parity::None,
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stop_bits: StopBits::One,
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}
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}
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}
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/// Encodes one byte into a sequence of GPIO BSRR words
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pub fn encode_uart_byte_cfg(
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pin_bit: u8,
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data: u8,
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cfg: &UartConfig,
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out: &mut [u32; 12],
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) -> usize {
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// GPIOx_BSRR register str. 636 kap. 13.4.7
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let set_high = |bit: u8| -> u32 { 1u32 << bit };
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let set_low = |bit: u8| -> u32 { 0 };
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// let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) };
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let mut idx = 0usize;
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// START bit (LOW)
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out[idx] = set_low(pin_bit);
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idx += 1;
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// Data bits, LSB-first
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let nbits = cfg.data_bits.clamp(5, 8);
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for i in 0..nbits {
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let one = ((data >> i) & 1) != 0;
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out[idx] = if one { set_high(pin_bit) } else { set_low(pin_bit) };
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idx += 1;
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}
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// Parity
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match cfg.parity {
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Parity::None => {}
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Parity::Even | Parity::Odd => {
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let mask: u8 = if nbits == 8 { 0xFF } else { (1u16 << nbits) as u8 - 1 };
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let ones = (data & mask).count_ones() & 1;
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let par_bit_is_one = match cfg.parity {
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Parity::Even => ones == 1,
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Parity::Odd => ones == 0,
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_ => false,
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};
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out[idx] = if par_bit_is_one {
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set_high(pin_bit)
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} else {
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set_low(pin_bit)
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};
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idx += 1;
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}
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}
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// STOP bits (HIGH)
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let stop_ticks = match cfg.stop_bits {
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StopBits::One => 1usize,
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StopBits::Two => 2usize,
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};
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for _ in 0..stop_ticks {
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out[idx] = set_high(pin_bit);
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idx += 1;
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}
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idx
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}
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/// Decode an oversampled stream of logic levels into UART bytes.
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pub fn decode_uart_samples(
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samples: &[u8],
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oversample: u16,
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cfg: &UartConfig,
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) -> heapless::Vec<u8, 256> {
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let mut out = Vec::<u8, 256>::new();
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let mut idx = 0usize;
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let nbits = cfg.data_bits as usize;
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while idx + (oversample as usize * (nbits + 3)) < samples.len() {
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// Wait for start bit (falling edge: high -> low)
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if samples[idx] != 0 && samples[idx + 1] == 0 {
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// Align to middle of start bit
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idx += (oversample / 2) as usize;
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// Sanity check start bit really low
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if samples.get(idx).copied().unwrap_or(1) != 0 {
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idx += 1;
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continue;
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}
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// Sample data bits
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let mut data: u8 = 0;
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for bit in 0..nbits {
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idx += oversample as usize;
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let bit_val = samples
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.get(idx)
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.map(|&b| if b != 0 { 1u8 } else { 0u8 })
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.unwrap_or(1);
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data |= bit_val << bit;
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}
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// Parity: skip / verify
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match cfg.parity {
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Parity::None => {}
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Parity::Even | Parity::Odd => {
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idx += oversample as usize;
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// You can optionally add parity check here if needed
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}
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}
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// Move past stop bits
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let stop_skip = match cfg.stop_bits {
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StopBits::One => oversample as usize,
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StopBits::Two => (oversample * 2) as usize,
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};
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idx += stop_skip;
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// Push decoded byte
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let _ = out.push(data);
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} else {
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idx += 1;
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}
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}
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out
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}
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