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dd978ec65c
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dd978ec65c | ||
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3930716ac3 |
@@ -1,101 +1,70 @@
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// src/bin/main.rs
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#![no_std]
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#![no_main]
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use defmt::*;
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use embassy_executor::Spawner;
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use embassy_futures::yield_now;
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use embassy_stm32::dma::Request;
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use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
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use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
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use embassy_time::{Duration, Timer};
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use embassy_stm32::dma::{TransferOptions, WritableRingBuffer};
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use embassy_stm32::dma::{TransferOptions, Transfer, Priority, Request};
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use dma_gpio::software_uart::{
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dma_timer::init_tim6_for_uart,
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gpio_dma_uart_tx::encode_uart_frames,
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debug::dump_tim6_regs,
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};
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use dma_gpio::config::{BAUD, TX_PIN_BIT, RX_OVERSAMPLE, TX_OVERSAMPLE};
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use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES, PIPE_RX_SIZE};
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use dma_gpio::config::{BAUD, TX_PIN_BIT, TX_OVERSAMPLE};
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use static_cell::StaticCell;
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use {defmt_rtt as _, panic_probe as _};
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// kapitola 17.4.11 - 2 casovace pre 2 DMA
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pub const TIM6_UP_REQ: Request = 4; // Table 137: tim6_upd_dma, strana 687 STM32U5xx datasheet
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static TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
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use core::future::poll_fn;
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use core::task::Poll;
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async fn wait_for_space<'a, W: embassy_stm32::dma::word::Word>(
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ring: &mut embassy_stm32::dma::WritableRingBuffer<'a, W>,
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min_free: usize,
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) {
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poll_fn(|cx| {
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let used = ring.len().unwrap_or(0);
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let cap = ring.capacity();
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if cap - used > min_free {
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Poll::Ready(())
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} else {
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ring.set_waker(cx.waker());
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Poll::Pending
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}
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}).await
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unsafe fn start_dma<'a>(
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ch: embassy_hal_internal::Peri<'a, impl embassy_stm32::dma::Channel>,
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request: Request,
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odr_ptr: *mut u32,
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buf: &'a [u32],
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opts: TransferOptions,
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) -> Transfer<'a> {
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// new_write itself is unsafe
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unsafe { Transfer::new_write(ch, request, buf, odr_ptr, opts) }
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}
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pub const TIM6_UP_REQ: Request = 4;
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static BUF_A: StaticCell<[u32; 8]> = StaticCell::new();
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static BUF_B: StaticCell<[u32; 8]> = StaticCell::new();
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#[embassy_executor::main]
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async fn main(spawner: Spawner) {
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async fn main(_spawner: Spawner) {
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let p = embassy_stm32::init(Default::default());
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info!("Hehe");
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let _rx = Input::new(p.PA3, Pull::Up);
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let _tx = Output::new(p.PA2, Level::High, Speed::VeryHigh);
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let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
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init_tim6_for_uart(p.TIM6, BAUD, TX_OVERSAMPLE);
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dump_tim6_regs();
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// Safe one-time init from StaticCell
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let tx_ring_mem: &mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]);
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let buf_a = BUF_A.init([0u32; 8]);
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let buf_b = BUF_B.init([0u32; 8]);
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// Create and start the TX DMA ring in main.
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// let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
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let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
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let mut tx_opts = TransferOptions::default();
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tx_opts.half_transfer_ir = true;
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tx_opts.complete_transfer_ir = true;
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let mut opts = TransferOptions::default();
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opts.priority = Priority::VeryHigh;
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opts.complete_transfer_ir = true;
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// SAFETY: tx_ring_mem is exclusive
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let mut tx_ring = unsafe {
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WritableRingBuffer::new(
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p.GPDMA1_CH0,
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TIM6_UP_REQ,
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odr_ptr,
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tx_ring_mem,
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tx_opts,
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)
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};
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// Start DMA
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tx_ring.start();
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info!("TX DMA ring started");
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let mut frame_buf = [0u32; 4096];
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let mut ch0 = p.GPDMA1_CH0;
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let mut using_a = true;
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loop {
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info!("tick start");
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Timer::after(Duration::from_millis(400)).await;
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info!("tick end");
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let used = encode_uart_frames(TX_PIN_BIT, b"Hello marshmallow\r\n", &mut frame_buf).await;
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// Wait for DMA to free space, async style
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wait_for_space(&mut tx_ring, used / 2).await;
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if let Err(e) = tx_ring.write_exact(&frame_buf[..used]).await {
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warn!("DMA ring write error: {:?}", e);
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let (dma_buf, cpu_buf) = if using_a {
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(&*buf_a, &mut *buf_b)
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} else {
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info!("Frame queued to DMA ring");
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}
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(&*buf_b, &mut *buf_a)
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};
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let used = encode_uart_frames(TX_PIN_BIT, b"Hello marshmallow\r\n", cpu_buf).await;
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let transfer = unsafe {
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start_dma(ch0.reborrow(), TIM6_UP_REQ, odr_ptr, &dma_buf[..used], opts)
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};
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transfer.await;
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using_a = !using_a;
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yield_now().await;
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}
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