direct solution works

not working, i have no clue why
Tx only does not work
2025-11-06 00:36:38 +01:00 · 2025-11-05 23:40:59 +01:00 · 2025-11-05 21:03:30 +01:00 · 2025-11-05 16:38:26 +01:00 · 2025-11-05 14:45:36 +01:00 · 2025-11-05 09:44:41 +01:00
36 changed files with 3237 additions and 412 deletions
--- a/.gitignore
+++ b/.gitignore
@@ -1 +1,2 @@
 *.pdf
 dma_example/
--- a/dma_gpio/Cargo.lock
+++ b/dma_gpio/Cargo.lock
@@ -14,6 +14,15 @@ dependencies = [
 "zerocopy",
 ]
 [[package]]
 name = "aho-corasick"
 version = "1.1.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "ddd31a130427c27518df266943a5308ed92d4b226cc639f5a8f1002816174301"
 dependencies = [
 "memchr",
 ]
 [[package]]
 name = "aligned"
 version = "0.4.2"
@@ -98,12 +107,32 @@ version = "1.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b"
 [[package]]
 name = "cc"
 version = "1.2.44"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "37521ac7aabe3d13122dc382493e20c9416f299d2ccd5b3a5340a2570cdeb0f3"
 dependencies = [
 "find-msvc-tools",
 "shlex",
 ]
 [[package]]
 name = "cfg-if"
 version = "1.0.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "9330f8b2ff13f34540b44e946ef35111825727b38d33286ef986142615121801"
 [[package]]
 name = "cordyceps"
 version = "0.3.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "688d7fbb8092b8de775ef2536f36c8c31f2bc4006ece2e8d8ad2d17d00ce0a2a"
 dependencies = [
 "loom",
 "tracing",
 ]
 [[package]]
 name = "cortex-m"
 version = "0.7.7"
@@ -239,6 +268,7 @@ dependencies = [
 "defmt-rtt",
 "embassy-executor",
 "embassy-futures",
 "embassy-hal-internal",
 "embassy-stm32",
 "embassy-sync",
 "embassy-time",
@@ -249,6 +279,7 @@ dependencies = [
 "micromath",
 "panic-halt",
 "panic-probe",
 "static_cell",
 "tinybmp",
 ]
@@ -264,8 +295,7 @@ dependencies = [
 [[package]]
 name = "embassy-embedded-hal"
 version = "0.5.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "554e3e840696f54b4c9afcf28a0f24da431c927f4151040020416e7393d6d0d8"
 dependencies = [
 "defmt 1.0.1",
 "embassy-futures",
@@ -283,9 +313,9 @@ dependencies = [
 [[package]]
 name = "embassy-executor"
 version = "0.9.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "06070468370195e0e86f241c8e5004356d696590a678d47d6676795b2e439c6b"
 dependencies = [
 "cordyceps",
 "cortex-m",
 "critical-section",
 "document-features",
@@ -296,8 +326,7 @@ dependencies = [
 [[package]]
 name = "embassy-executor-macros"
 version = "0.7.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "dfdddc3a04226828316bf31393b6903ee162238576b1584ee2669af215d55472"
 dependencies = [
 "darling",
 "proc-macro2",
@@ -308,20 +337,17 @@ dependencies = [
 [[package]]
 name = "embassy-executor-timer-queue"
 version = "0.1.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "2fc328bf943af66b80b98755db9106bf7e7471b0cf47dc8559cd9a6be504cc9c"
 [[package]]
 name = "embassy-futures"
 version = "0.1.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "dc2d050bdc5c21e0862a89256ed8029ae6c290a93aecefc73084b3002cdebb01"
 [[package]]
 name = "embassy-hal-internal"
 version = "0.3.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "95285007a91b619dc9f26ea8f55452aa6c60f7115a4edc05085cd2bd3127cd7a"
 dependencies = [
 "cortex-m",
 "critical-section",
@@ -332,17 +358,15 @@ dependencies = [
 [[package]]
 name = "embassy-net-driver"
 version = "0.2.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "524eb3c489760508f71360112bca70f6e53173e6fe48fc5f0efd0f5ab217751d"
 dependencies = [
- "defmt 0.3.100",
+ "defmt 1.0.1",
 ]
 [[package]]
 name = "embassy-net-driver-channel"
 version = "0.3.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "b7b2739fbcf6cd206ae08779c7d709087b16577d255f2ea4a45bc4bbbf305b3f"
 dependencies = [
 "embassy-futures",
 "embassy-net-driver",
@@ -352,8 +376,7 @@ dependencies = [
 [[package]]
 name = "embassy-stm32"
 version = "0.4.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "0d972eab325cc96afee98f80a91ca6b00249b6356dc0fdbff68b70c200df9fae"
 dependencies = [
 "aligned",
 "bit_field",
@@ -385,6 +408,7 @@ dependencies = [
 "embedded-storage",
 "embedded-storage-async",
 "futures-util",
 "heapless 0.9.1",
 "nb 1.1.0",
 "proc-macro2",
 "quote",
@@ -401,8 +425,7 @@ dependencies = [
 [[package]]
 name = "embassy-sync"
 version = "0.7.2"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "73974a3edbd0bd286759b3d483540f0ebef705919a5f56f4fc7709066f71689b"
 dependencies = [
 "cfg-if",
 "critical-section",
@@ -416,8 +439,7 @@ dependencies = [
 [[package]]
 name = "embassy-time"
 version = "0.5.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "f4fa65b9284d974dad7a23bb72835c4ec85c0b540d86af7fc4098c88cff51d65"
 dependencies = [
 "cfg-if",
 "critical-section",
@@ -433,8 +455,7 @@ dependencies = [
 [[package]]
 name = "embassy-time-driver"
 version = "0.2.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "a0a244c7dc22c8d0289379c8d8830cae06bb93d8f990194d0de5efb3b5ae7ba6"
 dependencies = [
 "document-features",
 ]
@@ -442,8 +463,7 @@ dependencies = [
 [[package]]
 name = "embassy-time-queue-utils"
 version = "0.3.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "80e2ee86063bd028a420a5fb5898c18c87a8898026da1d4c852af2c443d0a454"
 dependencies = [
 "embassy-executor-timer-queue",
 "heapless 0.8.0",
@@ -452,8 +472,7 @@ dependencies = [
 [[package]]
 name = "embassy-usb"
 version = "0.5.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "dc4462e48b19a4f401a11901bdd981aab80c6a826608016a0bdc73cbbab31954"
 dependencies = [
 "embassy-futures",
 "embassy-net-driver-channel",
@@ -468,8 +487,7 @@ dependencies = [
 [[package]]
 name = "embassy-usb-driver"
 version = "0.2.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "17119855ccc2d1f7470a39756b12068454ae27a3eabb037d940b5c03d9c77b7a"
 dependencies = [
 "defmt 1.0.1",
 "embedded-io-async",
@@ -478,8 +496,7 @@ dependencies = [
 [[package]]
 name = "embassy-usb-synopsys-otg"
 version = "0.3.1"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/embassy.git?branch=main#9b1add3d83e98c6c9ae9230bf35cd89bba530a20"
 checksum = "288751f8eaa44a5cf2613f13cee0ca8e06e6638cb96e897e6834702c79084b23"
 dependencies = [
 "critical-section",
 "defmt 1.0.1",
@@ -594,6 +611,12 @@ version = "0.3.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "a357d28ed41a50f9c765dbfe56cbc04a64e53e5fc58ba79fbc34c10ef3df831f"
 [[package]]
 name = "find-msvc-tools"
 version = "0.1.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "52051878f80a721bb68ebfbc930e07b65ba72f2da88968ea5c06fd6ca3d3a127"
 [[package]]
 name = "float-cmp"
 version = "0.9.0"
@@ -639,6 +662,20 @@ dependencies = [
 "pin-utils",
 ]
 [[package]]
 name = "generator"
 version = "0.8.7"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "605183a538e3e2a9c1038635cc5c2d194e2ee8fd0d1b66b8349fad7dbacce5a2"
 dependencies = [
 "cc",
 "cfg-if",
 "libc",
 "log",
 "rustversion",
 "windows",
 ]
 [[package]]
 name = "hash32"
 version = "0.3.1"
@@ -683,6 +720,18 @@ version = "1.0.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "b9e0384b61958566e926dc50660321d12159025e767c18e043daf26b70104c39"
 [[package]]
 name = "lazy_static"
 version = "1.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe"
 [[package]]
 name = "libc"
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 [[package]]
 name = "litrs"
 version = "0.4.2"
@@ -695,6 +744,34 @@ version = "0.4.28"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "34080505efa8e45a4b816c349525ebe327ceaa8559756f0356cba97ef3bf7432"
 [[package]]
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 checksum = "419e0dc8046cb947daa77eb95ae174acfbddb7673b4151f56d1eed8e93fbfaca"
 dependencies = [
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 "generator",
 "scoped-tls",
 "tracing",
 "tracing-subscriber",
 ]
 [[package]]
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 [[package]]
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 [[package]]
 name = "micromath"
 version = "2.1.0"
@@ -716,6 +793,15 @@ version = "1.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "8d5439c4ad607c3c23abf66de8c8bf57ba8adcd1f129e699851a6e43935d339d"
 [[package]]
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 dependencies = [
 "windows-sys",
 ]
 [[package]]
 name = "num-traits"
 version = "0.2.19"
@@ -817,6 +903,23 @@ version = "0.9.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "99d9a13982dcf210057a8a78572b2217b667c3beacbf3a0d8b454f6f82837d38"
 [[package]]
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 "memchr",
 "regex-syntax",
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 [[package]]
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 [[package]]
 name = "rustc_version"
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@@ -826,6 +929,18 @@ dependencies = [
 "semver",
 ]
 [[package]]
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 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "b39cdef0fa800fc44525c84ccb54a029961a8215f9619753635a9c0d2538d46d"
 [[package]]
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 [[package]]
 name = "sdio-host"
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@@ -876,6 +991,27 @@ dependencies = [
 "syn 2.0.107",
 ]
 [[package]]
 name = "sharded-slab"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
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 [[package]]
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 [[package]]
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@@ -898,6 +1034,15 @@ version = "1.1.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f"
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 dependencies = [
 "portable-atomic",
 ]
 [[package]]
 name = "stm32-fmc"
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@@ -910,8 +1055,7 @@ dependencies = [
 [[package]]
 name = "stm32-metapac"
 version = "18.0.0"
-source = "registry+https://github.com/rust-lang/crates.io-index"
+source = "git+https://github.com/embassy-rs/stm32-data-generated?tag=stm32-data-b9f6b0c542d85ee695d71c35ced195e0cef51ac0#9b8fb67703361e2237b6c1ec4f1ee5949223d412"
 checksum = "6fd8ec3a292a0d9fc4798416a61b21da5ae50341b2e7b8d12e662bf305366097"
 dependencies = [
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 "cortex-m-rt",
@@ -966,6 +1110,15 @@ dependencies = [
 "syn 2.0.107",
 ]
 [[package]]
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 dependencies = [
 "cfg-if",
 ]
 [[package]]
 name = "tinybmp"
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@@ -975,6 +1128,67 @@ dependencies = [
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 ]
 [[package]]
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 "tracing-core",
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 [[package]]
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 dependencies = [
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 [[package]]
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 dependencies = [
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 dependencies = [
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 "once_cell",
 "regex-automata",
 "sharded-slab",
 "smallvec",
 "thread_local",
 "tracing",
 "tracing-core",
 "tracing-log",
 ]
 [[package]]
 name = "unicode-ident"
 version = "1.0.19"
@@ -1028,6 +1242,12 @@ dependencies = [
 "usbd-hid-descriptors",
 ]
 [[package]]
 name = "valuable"
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 source = "registry+https://github.com/rust-lang/crates.io-index"
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 [[package]]
 name = "vcell"
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@@ -1055,6 +1275,132 @@ dependencies = [
 "vcell",
 ]
 [[package]]
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 source = "registry+https://github.com/rust-lang/crates.io-index"
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 dependencies = [
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 "windows-core",
 "windows-future",
 "windows-link 0.1.3",
 "windows-numerics",
 ]
 [[package]]
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 checksum = "3beeceb5e5cfd9eb1d76b381630e82c4241ccd0d27f1a39ed41b2760b255c5e8"
 dependencies = [
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 [[package]]
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 dependencies = [
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 "windows-threading",
 ]
 [[package]]
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 checksum = "053e2e040ab57b9dc951b72c264860db7eb3b0200ba345b4e4c3b14f67855ddf"
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 "quote",
 "syn 2.0.107",
 ]
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 [[package]]
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 dependencies = [
 "windows-link 0.1.3",
 ]
 [[package]]
 name = "zerocopy"
 version = "0.8.27"
--- a/dma_gpio/Cargo.toml
+++ b/dma_gpio/Cargo.toml
@@ -10,12 +10,13 @@ cortex-m = { version = "0.7.7", features = ["inline-asm", "critical-section-sing
 cortex-m-rt = "0.7.5"
 panic-halt = "1.0.0"
-embassy-executor = { version = "0.9.1", features = ["arch-cortex-m", "executor-thread"] }
+embassy-executor = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["arch-cortex-m", "executor-thread"] }
-embassy-futures = "0.1.2"
+embassy-futures = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
-embassy-stm32 = { version = "0.4.0", features = ["unstable-pac", "stm32u575zi", "time-driver-any", "memory-x", "defmt"] }
+embassy-sync    = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
-embassy-sync = "0.7.2"
+embassy-time    = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["tick-hz-32_768"] }
-embassy-time = { version = "0.5.0", features = ["tick-hz-32_768"] }
+embassy-hal-internal = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
-embassy-usb = "0.5.1"
+embassy-usb = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
 embassy-stm32 = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["unstable-pac", "stm32u575zi", "time-driver-tim2", "memory-x", "defmt"] }
 embedded-hal = "1.0.0"
 embedded-graphics = "0.8.1"
@@ -25,3 +26,4 @@ tinybmp = "0.6.0"
 panic-probe = { version = "1.0.0", features = ["defmt"] }
 defmt-rtt = "1.1.0"
 defmt = "1.0.1"
 static_cell = "2.1.1"
--- a/dma_gpio/src/bin/main.rs
+++ b/dma_gpio/src/bin/main.rs
@@ -1,134 +1,79 @@
 // src/bin/main.rs
 #![no_std]
 #![no_main]
 use defmt::*;
 use embassy_executor::Spawner;
 use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
 use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
 use embassy_time::{Duration, Timer};
-use dma_gpio::dma_timer::init_tim6_for_uart;
+use embassy_stm32::dma::{TransferOptions, WritableRingBuffer};
 use dma_gpio::software_uart::{
    dma_timer::{init_tim6_for_uart, init_tim7_for_uart},
    gpio_dma_uart_tx::{write_uart_frames_to_ring, TIM6_UP_REQ},
    gpio_dma_uart_rx::rx_dma_task,
    debug::dump_tim6_regs,
 };
 use dma_gpio::config::{BAUD, TX_PIN_BIT, RX_OVERSAMPLE, TX_OVERSAMPLE};
 use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES, PIPE_RX_SIZE};
 use static_cell::StaticCell;
 use {defmt_rtt as _, panic_probe as _};
-use embassy_stm32::{
+static PIPE_RX: Pipe<CriticalSectionRawMutex, PIPE_RX_SIZE> = Pipe::new();
-    gpio::{Level, Output, Speed},
+static RX_RING: StaticCell<[u8; RX_RING_BYTES]> = StaticCell::new();
-    peripherals::GPDMA1_CH0,
+static TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
 };
 use embassy_stm32::Peri;
 use dma_gpio::gpio_dma_uart::{
    write_uart_frames_to_pipe, GpioDmaBsrrTx, Parity, StopBits, UartConfig,
 };
 static PIPE: Pipe<CriticalSectionRawMutex, 256> = Pipe::new();
 // Baud rate: one TIM6 update equals one UART bit-time
 const BAUD: u32 = 115_200;
 const TX_PIN_BIT: u8 = 2; // PA2
 const OVERSAMPLE: u16 = 6;
 const UART_CFG: UartConfig = UartConfig {
    data_bits: 8,
    parity: Parity::None,
    stop_bits: StopBits::One,
 };
 fn dump_tim6_regs() {
    // PAC path for STM32U5: module `tim6`, type `Tim6` with ptr()
    use embassy_stm32::pac::timer::TimBasic;
    let tim = unsafe { TimBasic::from_ptr(0x4000_1000usize as _) };
    let sr = tim.sr().read();
    let dier = tim.dier().read();
    let cr1 = tim.cr1().read();
    let arr = tim.arr().read().arr();
    let psc = tim.psc().read();
    info!(
        "TIM6: CR1.CEN={} DIER.UDE={} SR.UIF={} PSC={} ARR={}",
        cr1.cen(),
        dier.ude(),
        sr.uif(),
        psc,
        arr
    );
 }
 fn dump_dma_ch0_regs() {
    // PAC path for GPDMA1: module `gpdma1`, type `Gpdma1`
    use embassy_stm32::pac::gpdma::Gpdma;
    let dma = unsafe { Gpdma::from_ptr(0x4002_0000usize as _) };
    let ch = dma.ch(0);
    let cr = ch.cr().read();
    let tr1 = ch.tr1().read();
    let tr2 = ch.tr2().read();
    let br1 = ch.br1().read();
    info!(
        "GPDMA1_CH0: EN={} PRIO={} SDW={} DDW={} SINC={} DINC={} REQSEL={} SWREQ={} DREQ={} BNDT={}",
        cr.en(),
        cr.prio(),
        tr1.sdw(),
        tr1.ddw(),
        tr1.sinc(),
        tr1.dinc(),
        tr2.reqsel(),
        tr2.swreq(),
        tr2.dreq(),
        br1.bndt()
    );
 }
 #[embassy_executor::main]
 async fn main(spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
-    info!("DMA Pipe -> GPIO UART-like TX");
+    info!("Hehe");
    let _rx = Input::new(p.PA3, Pull::Up);
    let _tx = Output::new(p.PA2, Level::High, Speed::VeryHigh);
    init_tim6_for_uart(p.TIM6, BAUD, TX_OVERSAMPLE);
    init_tim7_for_uart(p.TIM7, BAUD, RX_OVERSAMPLE);
    // PA2 is the TX "wire"
    let _pa2 = Output::new(p.PA2, Level::High, Speed::VeryHigh);
    // drop(_pa2);
    init_tim6_for_uart(p.TIM6, BAUD, OVERSAMPLE);
    dump_tim6_regs();
-    // Start DMA consumer task
+    // Safe one-time init from StaticCell
-    spawner.spawn(dma_tx_task(p.GPDMA1_CH0)).unwrap();
+    let rx_ring: &mut [u8; RX_RING_BYTES] = RX_RING.init([0; RX_RING_BYTES]);
    let tx_ring_mem: &mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]);
-    // Example: transmit a string as UART frames via the Pipe
+    // Spawn tasks
-    loop {
+    spawner.spawn(rx_dma_task(p.GPDMA1_CH1, &PIPE_RX, rx_ring).unwrap());
        write_uart_frames_to_pipe(
            &PIPE,
            TX_PIN_BIT,
            b"Hello, DMA UART (configurable)!\r\n",
            &UART_CFG,
        ).await;
        Timer::after(Duration::from_secs(2)).await;
    }
 }
-#[embassy_executor::task]
+    // Create and start the TX DMA ring in main.
-async fn dma_tx_task(ch: Peri<'static, GPDMA1_CH0>) {
+    // let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
-    let mut tx = GpioDmaBsrrTx::new(ch);
+    let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
    let mut tx_opts = TransferOptions::default();
    tx_opts.half_transfer_ir = true;
    tx_opts.complete_transfer_ir = true;
-    info!("DMA task started, waiting for frames...");
+    // SAFETY: tx_ring_mem is exclusive
-    loop {
+    let mut tx_ring = unsafe {
-        // Read one 32-bit BSRR word (4 bytes) from the Pipe
+        WritableRingBuffer::new(
-        let mut b = [0u8; 4];
+            p.GPDMA1_CH0,
-        let n = PIPE.read(&mut b).await;
+            TIM6_UP_REQ,
-        if n != 4 {
+            odr_ptr,
-            continue;
+            tx_ring_mem,
-        }
+            tx_opts,
        let w = u32::from_le_bytes(b);
        info!("DMA write 0x{:08X} -> GPIOA.BSRR", w);
        match embassy_time::with_timeout(
            Duration::from_millis(20),
            tx.write_word(w),
        )
-        .await
+    };
-        {
+    // Start DMA
-            Ok(()) => {}
+    tx_ring.start();
-            Err(_) => {
+    info!("TX DMA ring started");
-                warn!("DMA timeout: no TIM6 request (wrong DMAMUX req?)");
+
-                dump_tim6_regs();
+    loop {
-                dump_dma_ch0_regs();
+        info!("tick start");
-            }
+        Timer::after(Duration::from_millis(100)).await;
-        }
+        info!("tick end");
        write_uart_frames_to_ring(
            &mut tx_ring,
            TX_PIN_BIT,
            b"Hello marshmallow\r\n",
        ).await;
        info!("text");
        Timer::after(Duration::from_secs(1)).await;
    }
 }
--- a/dma_gpio/src/config.rs
+++ b/dma_gpio/src/config.rs
@@ -0,0 +1,16 @@
 // src/config.rs
 use crate::software_uart::uart_emulation::{Parity, StopBits, UartConfig};
 pub const BAUD: u32 = 115_200;
 pub const TX_PIN_BIT: u8 = 2; // PA2
 pub const TX_OVERSAMPLE: u16 = 1;
 pub const RX_OVERSAMPLE: u16 = 16;
 pub const RX_RING_BYTES: usize = 4096;
 pub const TX_RING_BYTES: usize = 4096;
 pub const PIPE_RX_SIZE: usize = 256;
 pub const UART_CFG: UartConfig = UartConfig {
    data_bits: 8,
    parity: Parity::None,
    stop_bits: StopBits::One,
 };
--- a/dma_gpio/src/gpio_dma_uart.rs
+++ b/dma_gpio/src/gpio_dma_uart.rs
@@ -1,167 +0,0 @@
 // src/gpio_dma_uart.rs
 use embassy_stm32::{
    dma::{Request, Transfer, TransferOptions},
    peripherals::GPDMA1_CH0,
    Peri,
 };
 use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
 pub const TIM6_UP_REQ: Request = 4; // Table 137: tim6_upd_dma, strana 687 STM32U5xx datasheet
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum Parity {
    None,
    Even,
    Odd,
 }
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum StopBits {
    One,
    Two,
 }
 #[derive(Clone, Copy, Debug)]
 pub struct UartConfig {
    pub data_bits: u8, // 5..=8 bitov strana 16 TI_uart
    pub parity: Parity,
    pub stop_bits: StopBits,
 }
 impl Default for UartConfig {
    fn default() -> Self {
        Self {
            data_bits: 8,
            parity: Parity::None,
            stop_bits: StopBits::One,
        }
    }
 }
 pub struct GpioDmaBsrrTx<'d> {
    ch: Peri<'d, GPDMA1_CH0>,
    bsrr: *mut u32,
    opts: TransferOptions,
 }
 impl<'d> GpioDmaBsrrTx<'d> {
    // Constructor. Hides the raw register pointer internally.
    pub fn new(ch: Peri<'d, GPDMA1_CH0>) -> Self {
        let bsrr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
        Self {
            ch,
            bsrr,
            opts: TransferOptions::default(),
        }
    }
    // Safe API: perform one timer-paced DMA write of a single 32-bit BSRR word.
    pub async fn write_word(&mut self, word: u32) {
        let buf = [word];
        // Safety: bsrr is a valid 32-bit aligned register, buf lives until DMA completes,
        // request selects TIM6_UP, which paces one beat per update.
        unsafe {
            Transfer::new_write(
                self.ch.reborrow(),
                TIM6_UP_REQ,
                &buf,
                self.bsrr,
                self.opts,
            )
        }
        .await;
    }
 }
 // Build up to 12 BSRR words for one UART frame on a given GPIO bit.
 // Format: 1 START (low), N data (LSB first), optional PARITY, STOP(1/2 -> here 1 or 2 ticks).
 // BSRR je safe atomic write only shortcut
 pub fn encode_uart_byte_cfg(
    pin_bit: u8,
    data: u8,
    cfg: &UartConfig,
    out: &mut [u32; 12],
 ) -> usize {
    // Dokumentacia strana 636 13.4.7
    // set bit - HIGH, reset bit - LOW (BSRR)
    let set_high = |bit: u8| -> u32 { 1u32 << bit };
    let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) };
    let mut idx = 0usize;
    // START bit (LOW)
    out[idx] = set_low(pin_bit);
    idx += 1;
    // Data bits, LSB first (5..=8)
    let nbits = cfg.data_bits.clamp(5, 8);
    for i in 0..nbits {
        let one = ((data >> i) & 1) != 0;
        out[idx] = if one { set_high(pin_bit) } else { set_low(pin_bit) };
        idx += 1;
    }
    // Optional parity
    match cfg.parity {
        Parity::None => {}
        Parity::Even | Parity::Odd => {
            // Count ones
            let mask: u8 = if nbits == 8 { 0xFF } else { (1u16 << nbits) as u8 - 1 };
            let ones = (data & mask).count_ones() & 1; // 0=even, 1=odd
            let par_bit_is_one = match cfg.parity {
                Parity::Even => ones == 1, // make total ones even
                Parity::Odd => ones == 0,  // make total ones odd
                _ => false,
            };
            out[idx] = if par_bit_is_one {
                set_high(pin_bit)
            } else {
                set_low(pin_bit)
            };
            idx += 1;
        }
    }
    // STOP bits (HIGH)
    //  - STB=0 => 1 stop bit
    //  - STB=1 => 2 stop bits
    let stop_ticks = match cfg.stop_bits {
        StopBits::One => 1usize,
        StopBits::Two => 2usize,
    };
    for _ in 0..stop_ticks {
        out[idx] = set_high(pin_bit);
        idx += 1;
    }
    idx
 }
 // Push UART frames for a whole byte slice into a Pipe.
 pub async fn write_uart_frames_to_pipe<const N: usize>(
    pipe: &Pipe<CriticalSectionRawMutex, N>,
    pin_bit: u8,
    bytes: &[u8],
    cfg: &UartConfig,
 ) {
    for &b in bytes {
        let mut frame = [0u32; 12];
        let used = encode_uart_byte_cfg(pin_bit, b, cfg, &mut frame);
        for w in &frame[..used] {
            pipe.write(&w.to_le_bytes()).await;
        }
    }
 }
 // Optional: emit a BREAK (line LOW for 'bits' bit-times).
 pub async fn write_break_to_pipe<const N: usize>(
    pipe: &Pipe<CriticalSectionRawMutex, N>,
    pin_bit: u8,
    bits: usize,
 ) {
    let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) };
    let word = set_low(pin_bit);
    for _ in 0..bits {
        pipe.write(&word.to_le_bytes()).await;
    }
 }
--- a/dma_gpio/src/lib.rs
+++ b/dma_gpio/src/lib.rs
@@ -1,7 +1,4 @@
 #![no_std]
-pub mod gpio_dma_uart;
+pub mod software_uart;
-pub use gpio_dma_uart::*;
+pub mod config;
 pub mod dma_timer;
 pub use dma_timer::*;
--- a/dma_gpio/src/software_uart/debug.rs
+++ b/dma_gpio/src/software_uart/debug.rs
@@ -0,0 +1,43 @@
 // src/software_uart/debug.rs
 use defmt::info;
 pub fn dump_tim6_regs() {
    use embassy_stm32::pac::timer::TimBasic;
    let tim = unsafe { TimBasic::from_ptr(0x4000_1000usize as _) };
    let sr = tim.sr().read();
    let dier = tim.dier().read();
    let cr1 = tim.cr1().read();
    let arr = tim.arr().read().arr();
    let psc = tim.psc().read();
    info!(
        "TIM6: CR1.CEN={} DIER.UDE={} SR.UIF={} PSC={} ARR={}",
        cr1.cen(),
        dier.ude(),
        sr.uif(),
        psc,
        arr
    );
 }
 pub fn dump_dma_ch0_regs() {
    use embassy_stm32::pac::gpdma::Gpdma;
    let dma = unsafe { Gpdma::from_ptr(0x4002_0000usize as _) };
    let ch = dma.ch(0);
    let cr = ch.cr().read();
    let tr1 = ch.tr1().read();
    let tr2 = ch.tr2().read();
    let br1 = ch.br1().read();
    info!(
        "GPDMA1_CH0: EN={} PRIO={} SDW={} DDW={} SINC={} DINC={} REQSEL={} SWREQ={} DREQ={} BNDT={}",
        cr.en(),
        cr.prio(),
        tr1.sdw(),
        tr1.ddw(),
        tr1.sinc(),
        tr1.dinc(),
        tr2.reqsel(),
        tr2.swreq(),
        tr2.dreq(),
        br1.bndt()
    );
 }
--- a/dma_gpio/src/software_uart/dma_timer.rs
+++ b/dma_gpio/src/software_uart/dma_timer.rs
@@ -0,0 +1,58 @@
 // src/dma_timer.rs
 use embassy_stm32::{
    peripherals::{TIM6, TIM7},
    rcc,
    timer::low_level::Timer,
    Peri,
 };
 use core::mem;
 use embassy_stm32::timer::BasicInstance;
 use embassy_stm32::pac::timer::vals::Urs;
 /// Initializes TIM6 to tick at `baud * oversample` frequency.
 /// Each TIM6 update event triggers one DMA beat.
 pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16) {
    rcc::enable_and_reset::<TIM6>();
    let ll = Timer::new(tim6);
    configure_basic_timer(&ll, baud, oversample);
    mem::forget(ll);
 }
 /// Initializes TIM7 to tick at `baud * oversample` frequency.
 /// Each TIM7 update event triggers one DMA beat.
 pub fn init_tim7_for_uart<'d>(tim7: Peri<'d, TIM7>, baud: u32, oversample: u16) {
    rcc::enable_and_reset::<TIM7>();
    let ll = Timer::new(tim7);
    configure_basic_timer(&ll, baud, oversample);
    mem::forget(ll);
 }
 // Shared internal helper — identical CR1/ARR setup
 fn configure_basic_timer<T: BasicInstance>(ll: &Timer<'_, T>, baud: u32, oversample: u16) {
    let f_timer = rcc::frequency::<T>().0;
    let target = baud.saturating_mul(oversample.max(1) as u32).max(1);
    // Compute ARR (prescaler = 0)
    let mut arr = (f_timer / target).saturating_sub(1) as u16;
    if arr == 0 { arr = 1; }
    ll.regs_basic().cr1().write(|w| {
        w.set_cen(false);
        w.set_opm(false);
        w.set_udis(false);
        w.set_urs(Urs::ANY_EVENT);
    });
    ll.regs_basic().psc().write_value(0u16);
    ll.regs_basic().arr().write(|w| w.set_arr(arr));
    ll.regs_basic().dier().modify(|w| w.set_ude(true));
    ll.regs_basic().egr().write(|w| w.set_ug(true));
    ll.regs_basic().cr1().write(|w| {
        w.set_opm(false);
        w.set_cen(true);
        w.set_udis(false);
        w.set_urs(Urs::ANY_EVENT);
    });
 }
--- a/dma_gpio/src/software_uart/gpio_dma_uart_rx.rs
+++ b/dma_gpio/src/software_uart/gpio_dma_uart_rx.rs
@@ -0,0 +1,44 @@
 // src/software_uart/runtime.rs
 use embassy_executor::task;
 use embassy_stm32::{
    dma::Request,
    peripherals::GPDMA1_CH1,
    Peri,
 };
 use embassy_stm32::dma::{
    ReadableRingBuffer,
    TransferOptions,
 };
 use crate::config::{RX_OVERSAMPLE, UART_CFG};
 use crate::software_uart::decode_uart_samples;
 use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
 use embassy_futures::yield_now;
 // datasheet tabulka 137
 pub const TIM7_UP_REQ: Request = 5;
 /// RX DMA task: reads GPIO samples paced by TIM7 and fills PIPE_RX
 #[task]
 pub async fn rx_dma_task(
    ch: Peri<'static, GPDMA1_CH1>,
    pipe_rx: &'static Pipe<CriticalSectionRawMutex, 256>,
    ring: &'static mut [u8],
 ) {
    let gpioa_idr = embassy_stm32::pac::GPIOA.idr().as_ptr() as *mut u8;
    let mut opts = TransferOptions::default();
    opts.half_transfer_ir = true;
    opts.complete_transfer_ir = true;
    // SAFETY: ring is exclusive to this task
    let mut rx = unsafe { ReadableRingBuffer::new(ch, TIM7_UP_REQ, gpioa_idr, ring, opts) };
    rx.start();
    let mut chunk = [0u8; 256];
    loop {
        let _ = rx.read_exact(&mut chunk).await;
        let decoded = decode_uart_samples(&chunk, RX_OVERSAMPLE, &UART_CFG);
        pipe_rx.write(&decoded).await;
        yield_now().await;
    }
 }
--- a/dma_gpio/src/software_uart/gpio_dma_uart_tx.rs
+++ b/dma_gpio/src/software_uart/gpio_dma_uart_tx.rs
@@ -0,0 +1,23 @@
 // src/software_uart/gpio_dma_uart_tx.rs
 use embassy_stm32::dma::Request;
 use embassy_stm32::dma::WritableRingBuffer;
 use crate::software_uart::uart_emulation::encode_uart_byte_cfg;
 use crate::config::UART_CFG;
 // kapitola 17.4.11 - 2 casovace pre 2 DMA
 pub const TIM6_UP_REQ: Request = 4; // Table 137: tim6_upd_dma, strana 687 STM32U5xx datasheet
 /// Push UART frames into the DMA-backed TX ring
 pub async fn write_uart_frames_to_ring(
    ring: &mut WritableRingBuffer<'static, u32>,
    pin_bit: u8,
    bytes: &[u8],
 ) {
    for &b in bytes {
        let mut frame = [0u32; 12];
        let used = encode_uart_byte_cfg(pin_bit, b, &UART_CFG, &mut frame);
        // Will wait until all words are written
        ring.write_exact(&frame[..used]).await.unwrap();
    }
 }
--- a/dma_gpio/src/software_uart/mod.rs
+++ b/dma_gpio/src/software_uart/mod.rs
@@ -0,0 +1,13 @@
 // src/software_uart/mod.rs
 pub mod gpio_dma_uart_tx;
 pub mod gpio_dma_uart_rx;
 pub mod dma_timer;
 pub mod uart_emulation;
 pub mod debug;
 pub use gpio_dma_uart_tx::*;
 pub use gpio_dma_uart_rx::*;
 pub use dma_timer::*;
 pub use uart_emulation::*;
 pub use debug::*;
--- a/dma_gpio/src/software_uart/uart_emulation.rs
+++ b/dma_gpio/src/software_uart/uart_emulation.rs
@@ -0,0 +1,151 @@
 // src/software_uart/uart_emulation.rs
 use heapless::Vec;
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum Parity {
    None,
    Even,
    Odd,
 }
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum StopBits {
    One,
    Two,
 }
 #[derive(Clone, Copy, Debug)]
 pub struct UartConfig {
    pub data_bits: u8,
    pub parity: Parity,
    pub stop_bits: StopBits,
 }
 impl Default for UartConfig {
    fn default() -> Self {
        Self {
            data_bits: 8,
            parity: Parity::None,
            stop_bits: StopBits::One,
        }
    }
 }
 /// Encodes one byte into a sequence of GPIO BSRR words
 pub fn encode_uart_byte_cfg(
    pin_bit: u8,
    data: u8,
    cfg: &UartConfig,
    out: &mut [u32; 12],
 ) -> usize {
    // GPIOx_BSRR register str. 636 kap. 13.4.7
    let set_high = |bit: u8| -> u32 { 1u32 << bit };
    let set_low = |bit: u8| -> u32 { 0 };
    // let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) };
    let mut idx = 0usize;
    // START bit (LOW)
    out[idx] = set_low(pin_bit);
    idx += 1;
    // Data bits, LSB-first
    let nbits = cfg.data_bits.clamp(5, 8);
    for i in 0..nbits {
        let one = ((data >> i) & 1) != 0;
        out[idx] = if one { set_high(pin_bit) } else { set_low(pin_bit) };
        idx += 1;
    }
    // Parity
    match cfg.parity {
        Parity::None => {}
        Parity::Even | Parity::Odd => {
            let mask: u8 = if nbits == 8 { 0xFF } else { (1u16 << nbits) as u8 - 1 };
            let ones = (data & mask).count_ones() & 1;
            let par_bit_is_one = match cfg.parity {
                Parity::Even => ones == 1,
                Parity::Odd => ones == 0,
                _ => false,
            };
            out[idx] = if par_bit_is_one {
                set_high(pin_bit)
            } else {
                set_low(pin_bit)
            };
            idx += 1;
        }
    }
    // STOP bits (HIGH)
    let stop_ticks = match cfg.stop_bits {
        StopBits::One => 1usize,
        StopBits::Two => 2usize,
    };
    for _ in 0..stop_ticks {
        out[idx] = set_high(pin_bit);
        idx += 1;
    }
    idx
 }
 /// Decode an oversampled stream of logic levels into UART bytes.
 pub fn decode_uart_samples(
    samples: &[u8],
    oversample: u16,
    cfg: &UartConfig,
 ) -> heapless::Vec<u8, 256> {
    let mut out = Vec::<u8, 256>::new();
    let mut idx = 0usize;
    let nbits = cfg.data_bits as usize;
    while idx + (oversample as usize * (nbits + 3)) < samples.len() {
        // Wait for start bit (falling edge: high -> low)
        if samples[idx] != 0 && samples[idx + 1] == 0 {
            // Align to middle of start bit
            idx += (oversample / 2) as usize;
            // Sanity check start bit really low
            if samples.get(idx).copied().unwrap_or(1) != 0 {
                idx += 1;
                continue;
            }
            // Sample data bits
            let mut data: u8 = 0;
            for bit in 0..nbits {
                idx += oversample as usize;
                let bit_val = samples
                    .get(idx)
                    .map(|&b| if b != 0 { 1u8 } else { 0u8 })
                    .unwrap_or(1);
                data |= bit_val << bit;
            }
            // Parity: skip / verify
            match cfg.parity {
                Parity::None => {}
                Parity::Even | Parity::Odd => {
                    idx += oversample as usize;
                    // You can optionally add parity check here if needed
                }
            }
            // Move past stop bits
            let stop_skip = match cfg.stop_bits {
                StopBits::One => oversample as usize,
                StopBits::Two => (oversample * 2) as usize,
            };
            idx += stop_skip;
            // Push decoded byte
            let _ = out.push(data);
        } else {
            idx += 1;
        }
    }
    out
 }
--- a/dma_gpio2/.cargo/config.toml
+++ b/dma_gpio2/.cargo/config.toml
@@ -0,0 +1,15 @@
 [build]
 target = "thumbv8m.main-none-eabihf"
 [target.thumbv8m.main-none-eabihf]
 runner = "probe-rs run --chip STM32U575ZITxQ"
 rustflags = [
  "-C", "linker=rust-lld",
  "-C", "link-arg=-Tlink.x",
  "-C", "link-arg=-Tdefmt.x",
  "-C", "link-arg=--nmagic",
 ]
 [package.metadata.cargo-flash]
 chip = "STM32U575ZIT"
--- a/dma_gpio2/.gitignore
+++ b/dma_gpio2/.gitignore
@@ -0,0 +1 @@
 /target
--- a/dma_gpio2/Cargo.lock
+++ b/dma_gpio2/Cargo.lock
--- a/dma_gpio2/Cargo.toml
+++ b/dma_gpio2/Cargo.toml
@@ -0,0 +1,29 @@
 [package]
 authors = ["Priec <filippriec@gmail.com>"]
 name = "dma_gpio"
 edition = "2024"
 version = "0.1.0"
 [dependencies]
 cortex-m = { version = "0.7.7", features = ["inline-asm", "critical-section-single-core"] }
 cortex-m-rt = "0.7.5"
 panic-halt = "1.0.0"
 embassy-executor = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["arch-cortex-m", "executor-thread"] }
 embassy-futures = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
 embassy-sync    = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
 embassy-time    = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["tick-hz-32_768"] }
 embassy-hal-internal = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
 embassy-usb = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
 embassy-stm32 = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["unstable-pac", "stm32u575zi", "time-driver-tim2", "memory-x", "defmt"] }
 embedded-hal = "1.0.0"
 embedded-graphics = "0.8.1"
 heapless = { version = "0.9.1", default-features = false }
 micromath = "2.1.0"
 tinybmp = "0.6.0"
 panic-probe = { version = "1.0.0", features = ["defmt"] }
 defmt-rtt = "1.1.0"
 defmt = "1.0.1"
 static_cell = "2.1.1"
--- a/dma_gpio2/LICENSE-APACHE
+++ b/dma_gpio2/LICENSE-APACHE
@@ -0,0 +1,201 @@
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--- a/dma_gpio2/LICENSE-MIT
+++ b/dma_gpio2/LICENSE-MIT
@@ -0,0 +1,23 @@
 Permission is hereby granted, free of charge, to any
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 IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 DEALINGS IN THE SOFTWARE.
--- a/dma_gpio2/Makefile
+++ b/dma_gpio2/Makefile
@@ -0,0 +1,23 @@
 TARGET = thumbv8m.main-none-eabihf
 CHIP = STM32U575ZI
 BIN = stm32u5-blinky
 MODE ?= release
 TARGET_DIR = target/$(TARGET)/$(MODE)
 ELF = $(TARGET_DIR)/$(BIN)
 PROBE = probe-rs
 .PHONY: all build flash clean empty
 all: build
 build:
 	cargo build --$(MODE)
 flash: build
 	$(PROBE) run --chip $(CHIP) $(ELF)
 empty:
 	$(PROBE) erase --chip $(CHIP)
 clean:
 	cargo clean
--- a/dma_gpio2/README.md
+++ b/dma_gpio2/README.md
@@ -0,0 +1,232 @@
 # `app-template`
 > Quickly set up a [`probe-rs`] + [`defmt`] + [`flip-link`] embedded project
 [`probe-rs`]: https://crates.io/crates/probe-rs
 [`defmt`]: https://github.com/knurling-rs/defmt
 [`flip-link`]: https://github.com/knurling-rs/flip-link
 ## Dependencies
 ### 1. `flip-link`:
 ```bash
 cargo install flip-link
 ```
 ### 2. `probe-rs`:
 Install probe-rs by following the instructions at <https://probe.rs/docs/getting-started/installation/>.
 ### 3. [`cargo-generate`]:
 ```bash
 cargo install cargo-generate
 ```
 [`cargo-generate`]: https://crates.io/crates/cargo-generate
 > *Note:* You can also just clone this repository instead of using `cargo-generate`, but this involves additional manual adjustments.
 ## Setup
 ### 1. Initialize the project template
 ```bash
 cargo generate \
    --git https://github.com/knurling-rs/app-template \
    --branch main \
    --name my-app
 ```
 If you look into your new `my-app` folder, you'll find that there are a few `TODO`s in the files marking the properties you need to set.
 Let's walk through them together now.
 ### 2. Set `probe-rs` chip
 Pick a chip from ` probe-rs chip list` and enter it into `.cargo/config.toml`.
 If, for example, you have a nRF52840 Development Kit as used in one of [our exercises], replace `{{chip}}` with `nRF52840_xxAA`.
 [our workshops]: https://rust-exercises.ferrous-systems.com
 ```diff
 # .cargo/config.toml
 -runner = ["probe-rs", "run", "--chip", "$CHIP", "--log-format=oneline"]
 +runner = ["probe-rs", "run", "--chip", "nRF52840_xxAA", "--log-format=oneline"]
 ```
 ### 3. Adjust the compilation target
 In `.cargo/config.toml`, pick the right compilation target for your board.
 ```diff
 # .cargo/config.toml
 [build]
 -target = "thumbv6m-none-eabi"    # Cortex-M0 and Cortex-M0+
 -# target = "thumbv7m-none-eabi"    # Cortex-M3
 -# target = "thumbv7em-none-eabi"   # Cortex-M4 and Cortex-M7 (no FPU)
 -# target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
 +target = "thumbv7em-none-eabihf" # Cortex-M4F (with FPU)
 ```
 Add the target with `rustup`.
 ```bash
 rustup target add thumbv7em-none-eabihf
 ```
 ### 4. Add a HAL as a dependency
 In `Cargo.toml`, list the Hardware Abstraction Layer (HAL) for your board as a dependency.
 For the nRF52840 you'll want to use the [`nrf52840-hal`].
 [`nrf52840-hal`]: https://crates.io/crates/nrf52840-hal
 ```diff
 # Cargo.toml
 [dependencies]
 -# some-hal = "1.2.3"
 +nrf52840-hal = "0.14.0"
 ```
 ⚠️ Note for RP2040 users ⚠️
 You will need to not just specify the `rp-hal` HAL, but a BSP (board support crate) which includes a second stage bootloader. Please find a list of available BSPs [here](https://github.com/rp-rs/rp-hal-boards#packages).
 ### 5. Import your HAL
 Now that you have selected a HAL, fix the HAL import in `src/lib.rs`
 ```diff
 // my-app/src/lib.rs
 -// use some_hal as _; // memory layout
 +use nrf52840_hal as _; // memory layout
 ```
 ### (6. Get a linker script)
 Some HAL crates require that you manually copy over a file called `memory.x` from the HAL to the root of your project. For nrf52840-hal, this is done automatically so no action is needed. For other HAL crates, see their documentation on where to find an example file.
 The `memory.x` file should look something like:
 ```text
 MEMORY
 {
  FLASH : ORIGIN = 0x00000000, LENGTH = 1024K
  RAM   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 ```
 The `memory.x` file is included in the `cortex-m-rt` linker script `link.x`, and so `link.x` is the one you should tell `rustc` to use (see the `.cargo/config.toml` file where we do that).
 ### 7. Run!
 You are now all set to `cargo-run` your first `defmt`-powered application!
 There are some examples in the `src/bin` directory.
 Start by `cargo run`-ning `my-app/src/bin/hello.rs`:
 ```console
 $ # `rb` is an alias for `run --bin`
 $ cargo rb hello
    Finished `dev` profile [optimized + debuginfo] target(s) in 0.01s
     Running `probe-rs run --chip nrf52840_xxaa --log-format=oneline target/thumbv6m-none-eabi/debug/hello`
      Erasing ✔ 100% [####################]   8.00 KiB @  15.79 KiB/s (took 1s)
  Programming ✔ 100% [####################]   8.00 KiB @  13.19 KiB/s (took 1s)                                                                                                                        Finished in 1.11s
 Hello, world!
 $ echo $?
 0
 ```
 If you're running out of memory (`flip-link` bails with an overflow error), you can decrease the size of the device memory buffer by setting the `DEFMT_RTT_BUFFER_SIZE` environment variable. The default value is 1024 bytes, and powers of two should be used for optimal performance:
 ```console
 $ DEFMT_RTT_BUFFER_SIZE=64 cargo rb hello
 ```
 ### (8. Set `rust-analyzer.linkedProjects`)
 If you are using [rust-analyzer] with VS Code for IDE-like features you can add following configuration to your `.vscode/settings.json` to make it work transparently across workspaces. Find the details of this option in the [RA docs].
 ```json
 {
    "rust-analyzer.linkedProjects": [
        "Cargo.toml",
        "firmware/Cargo.toml",
    ]
 }
 ```
 [RA docs]: https://rust-analyzer.github.io/manual.html#configuration
 [rust-analyzer]: https://rust-analyzer.github.io/
 ## Running tests
 The template comes configured for running unit tests and integration tests on the target.
 Unit tests reside in the library crate and can test private API; the initial set of unit tests are in `src/lib.rs`.
 `cargo test --lib` will run those unit tests.
 ```console
 $ cargo test --lib
   Compiling example v0.1.0 (./knurling-rs/example)
    Finished `test` profile [optimized + debuginfo] target(s) in 0.15s
     Running unittests src/lib.rs (target/thumbv6m-none-eabi/debug/deps/example-2b0d0e25d141bf57)
      Erasing ✔ 100% [####################]   8.00 KiB @  15.99 KiB/s (took 1s)
  Programming ✔ 100% [####################]   8.00 KiB @  13.33 KiB/s (took 1s)                                                                                                                        Finished in 1.10s
 (1/1) running `it_works`...
 all tests passed!
 ```
 Integration tests reside in the `tests` directory; the initial set of integration tests are in `tests/integration.rs`.
 `cargo test --test integration` will run those integration tests.
 Note that the argument of the `--test` flag must match the name of the test file in the `tests` directory.
 ```console
 $ cargo test --test integration
   Compiling example v0.1.0 (./knurling-rs/example)
    Finished `test` profile [optimized + debuginfo] target(s) in 0.10s
     Running tests/integration.rs (target/thumbv6m-none-eabi/debug/deps/integration-aaaff41151f6a722)
      Erasing ✔ 100% [####################]   8.00 KiB @  16.03 KiB/s (took 0s)
  Programming ✔ 100% [####################]   8.00 KiB @  13.19 KiB/s (took 1s)                                                                                                                        Finished in 1.11s
 (1/1) running `it_works`...
 all tests passed!
 ```
 Note that to add a new test file to the `tests` directory you also need to add a new `[[test]]` section to `Cargo.toml`.
 To run all the tests via `cargo test` the tests need to be explicitly disabled for all the existing binary targets.
 See `Cargo.toml` for details on how to do this.
 ## Support
 `app-template` is part of the [Knurling] project, [Ferrous Systems]' effort at
 improving tooling used to develop for embedded systems.
 If you think that our work is useful, consider sponsoring it via [GitHub
 Sponsors].
 ## License
 Licensed under either of
 - Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
  http://www.apache.org/licenses/LICENSE-2.0)
 - MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
 at your option.
 ### Contribution
 Unless you explicitly state otherwise, any contribution intentionally submitted
 for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
 licensed as above, without any additional terms or conditions.
 [Knurling]: https://knurling.ferrous-systems.com
 [Ferrous Systems]: https://ferrous-systems.com/
 [GitHub Sponsors]: https://github.com/sponsors/knurling-rs
--- a/dma_gpio2/src/bin/main.rs
+++ b/dma_gpio2/src/bin/main.rs
@@ -0,0 +1,95 @@
 // src/bin/main.rs
 #![no_std]
 #![no_main]
 use defmt::*;
 use embassy_executor::Spawner;
 use embassy_stm32::dma::Request;
 use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
 use embassy_time::{Duration, Timer};
 use embassy_stm32::dma::{TransferOptions, WritableRingBuffer};
 use dma_gpio::software_uart::{
    dma_timer::init_tim6_for_uart,
    gpio_dma_uart_tx::encode_uart_frames,
    debug::dump_tim6_regs,
 };
 use dma_gpio::config::{BAUD, TX_PIN_BIT, TX_OVERSAMPLE, TX_RING_BYTES};
 use static_cell::StaticCell;
 use core::slice;
 use {defmt_rtt as _, panic_probe as _};
 pub const TIM6_UP_REQ: Request = 4;
 static TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
    let p = embassy_stm32::init(Default::default());
    info!("DMA UART TX - Direct Buffer Modification");
    let _rx = Input::new(p.PA3, Pull::Up);
    let _tx = Output::new(p.PA2, Level::High, Speed::VeryHigh);
    init_tim6_for_uart(p.TIM6, BAUD, TX_OVERSAMPLE);
    dump_tim6_regs();
    // Initialize buffer - keep reference for modification
    let tx_ring_mem: &'static mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]);
    // Fill with UART idle state (pin high)
    let pin_mask = 1u32 << TX_PIN_BIT;
    for word in tx_ring_mem.iter_mut() {
        *word = pin_mask;
    }
    // Create DMA ring buffer with a SEPARATE slice created from raw parts
    // This allows us to keep modifying tx_ring_mem
    let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
    let tx_opts = TransferOptions::default();
    let mut tx_ring = unsafe {
        // Create a separate mutable slice pointing to the same memory
        let dma_slice = slice::from_raw_parts_mut(
            tx_ring_mem.as_mut_ptr(),
            tx_ring_mem.len()
        );
        WritableRingBuffer::new(
            p.GPDMA1_CH0,
            TIM6_UP_REQ,
            odr_ptr,
            dma_slice,
            tx_opts,
        )
    };
    tx_ring.start();
    info!("DMA started - continuously reading from buffer");
    // Temporary buffer for encoding
    let mut frame_buf = [0u32; 4096];
    loop {
        Timer::after(Duration::from_millis(400)).await;
        // Encode the UART frames
        let frame_len = encode_uart_frames(
            TX_PIN_BIT,
            b"Hello marshmallow\r\n",
            &mut frame_buf
        ).await;
        info!("Encoded {} words, copying to buffer...", frame_len);
        // Copy directly into the ring buffer memory
        // DMA will automatically read and transmit this!
        let copy_len = frame_len.min(TX_RING_BYTES);
        tx_ring_mem[..copy_len].copy_from_slice(&frame_buf[..copy_len]);
        // Fill rest with idle state
        for i in copy_len..TX_RING_BYTES {
            tx_ring_mem[i] = pin_mask;
        }
        info!("Buffer updated - DMA transmitting now");
    }
 }
--- a/dma_gpio2/src/config.rs
+++ b/dma_gpio2/src/config.rs
@@ -0,0 +1,16 @@
 // src/config.rs
 use crate::software_uart::uart_emulation::{Parity, StopBits, UartConfig};
 pub const BAUD: u32 = 9_600;
 pub const TX_PIN_BIT: u8 = 2; // PA2
 pub const TX_OVERSAMPLE: u16 = 1;
 pub const RX_OVERSAMPLE: u16 = 1;
 pub const RX_RING_BYTES: usize = 4096;
 pub const TX_RING_BYTES: usize = 256;
 pub const PIPE_RX_SIZE: usize = 256;
 pub const UART_CFG: UartConfig = UartConfig {
    data_bits: 8,
    parity: Parity::None,
    stop_bits: StopBits::One,
 };
--- a/dma_gpio2/src/lib.rs
+++ b/dma_gpio2/src/lib.rs
@@ -0,0 +1,4 @@
 #![no_std]
 pub mod software_uart;
 pub mod config;
--- a/dma_gpio2/src/software_uart/debug.rs
+++ b/dma_gpio2/src/software_uart/debug.rs
@@ -0,0 +1,43 @@
 // src/software_uart/debug.rs
 use defmt::info;
 pub fn dump_tim6_regs() {
    use embassy_stm32::pac::timer::TimBasic;
    let tim = unsafe { TimBasic::from_ptr(0x4000_1000usize as _) };
    let sr = tim.sr().read();
    let dier = tim.dier().read();
    let cr1 = tim.cr1().read();
    let arr = tim.arr().read().arr();
    let psc = tim.psc().read();
    info!(
        "TIM6: CR1.CEN={} DIER.UDE={} SR.UIF={} PSC={} ARR={}",
        cr1.cen(),
        dier.ude(),
        sr.uif(),
        psc,
        arr
    );
 }
 pub fn dump_dma_ch0_regs() {
    use embassy_stm32::pac::gpdma::Gpdma;
    let dma = unsafe { Gpdma::from_ptr(0x4002_0000usize as _) };
    let ch = dma.ch(0);
    let cr = ch.cr().read();
    let tr1 = ch.tr1().read();
    let tr2 = ch.tr2().read();
    let br1 = ch.br1().read();
    info!(
        "GPDMA1_CH0: EN={} PRIO={} SDW={} DDW={} SINC={} DINC={} REQSEL={} SWREQ={} DREQ={} BNDT={}",
        cr.en(),
        cr.prio(),
        tr1.sdw(),
        tr1.ddw(),
        tr1.sinc(),
        tr1.dinc(),
        tr2.reqsel(),
        tr2.swreq(),
        tr2.dreq(),
        br1.bndt()
    );
 }
--- a/dma_gpio2/src/software_uart/dma_timer.rs
+++ b/dma_gpio2/src/software_uart/dma_timer.rs
@@ -7,45 +7,43 @@ use embassy_stm32::{
    Peri,
 };
 use core::mem;
 use embassy_stm32::timer::BasicInstance;
 use embassy_stm32::pac::timer::vals::Urs;
 /// Initializes TIM6 to tick at `baud * oversample` frequency.
 /// Each TIM6 update event triggers one DMA beat.
 pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16) {
    rcc::enable_and_reset::<TIM6>();
    let ll = Timer::new(tim6);
    configure_basic_timer(&ll, baud, oversample);
    mem::forget(ll);
 }
-    let f_tim6 = rcc::frequency::<TIM6>().0;
+// Shared internal helper — identical CR1/ARR setup
 fn configure_basic_timer<T: BasicInstance>(ll: &Timer<'_, T>, baud: u32, oversample: u16) {
    let f_timer = rcc::frequency::<T>().0;
    let target = baud.saturating_mul(oversample.max(1) as u32).max(1);
-    // Compute ARR (prescaler=0)
+    // Compute ARR (prescaler = 0)
-    let mut arr = (f_tim6 / target).saturating_sub(1) as u16;
+    let mut arr = (f_timer / target).saturating_sub(1) as u16;
-    if arr == 0 {
+    if arr == 0 { arr = 1; }
        arr = 1;
    }
    ll.regs_basic().cr1().write(|w| {
        w.set_cen(false);
        w.set_opm(false);
-        w.set_udis(false);          // boolean field: false = allow UEV
+        w.set_udis(false);
-        w.set_urs(Urs::ANY_EVENT);   // enum field: DMA+interrupts on any event
+        w.set_urs(Urs::ANY_EVENT);
    });
    // Write prescaler directly (simple u16 register)
    ll.regs_basic().psc().write_value(0u16);
    // Set ARR, enable DMA request, issue first update
    ll.regs_basic().arr().write(|w| w.set_arr(arr));
    ll.regs_basic().dier().modify(|w| w.set_ude(true));
    ll.regs_basic().egr().write(|w| w.set_ug(true));
    // Start timer
    ll.regs_basic().cr1().write(|w| {
        w.set_opm(false);
        w.set_cen(true);
        w.set_udis(false);
        w.set_urs(Urs::ANY_EVENT);
    });
    mem::forget(ll);
 }
--- a/dma_gpio2/src/software_uart/gpio_dma_uart_tx.rs
+++ b/dma_gpio2/src/software_uart/gpio_dma_uart_tx.rs
@@ -0,0 +1,27 @@
 // src/software_uart/gpio_dma_uart_tx.rs
 use embassy_futures::yield_now;
 use crate::software_uart::uart_emulation::encode_uart_byte_cfg;
 use crate::config::UART_CFG;
 pub async fn encode_uart_frames<'a>(
    pin_bit: u8,
    bytes: &[u8],
    out_buf: &'a mut [u32],
 ) -> usize {
    let mut offset = 0;
    for &b in bytes {
        let mut frame = [0u32; 12];
        let used = encode_uart_byte_cfg(pin_bit, b, &UART_CFG, &mut frame);
        if offset + used <= out_buf.len() {
            out_buf[offset..offset + used].copy_from_slice(&frame[..used]);
            offset += used;
        } else {
            break;
        }
        // cooperative async yield
        yield_now().await;
    }
    offset
 }
--- a/dma_gpio2/src/software_uart/mod.rs
+++ b/dma_gpio2/src/software_uart/mod.rs
@@ -0,0 +1,11 @@
 // src/software_uart/mod.rs
 pub mod gpio_dma_uart_tx;
 pub mod dma_timer;
 pub mod uart_emulation;
 pub mod debug;
 pub use gpio_dma_uart_tx::*;
 pub use dma_timer::*;
 pub use uart_emulation::*;
 pub use debug::*;
--- a/dma_gpio2/src/software_uart/uart_emulation.rs
+++ b/dma_gpio2/src/software_uart/uart_emulation.rs
@@ -0,0 +1,151 @@
 // src/software_uart/uart_emulation.rs
 use heapless::Vec;
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum Parity {
    None,
    Even,
    Odd,
 }
 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
 pub enum StopBits {
    One,
    Two,
 }
 #[derive(Clone, Copy, Debug)]
 pub struct UartConfig {
    pub data_bits: u8,
    pub parity: Parity,
    pub stop_bits: StopBits,
 }
 impl Default for UartConfig {
    fn default() -> Self {
        Self {
            data_bits: 8,
            parity: Parity::None,
            stop_bits: StopBits::One,
        }
    }
 }
 /// Encodes one byte into a sequence of GPIO BSRR words
 pub fn encode_uart_byte_cfg(
    pin_bit: u8,
    data: u8,
    cfg: &UartConfig,
    out: &mut [u32; 12],
 ) -> usize {
    // GPIOx_BSRR register str. 636 kap. 13.4.7
    let set_high = |bit: u8| -> u32 { 1u32 << bit };
    let set_low = |bit: u8| -> u32 { 0 };
    // let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) };
    let mut idx = 0usize;
    // START bit (LOW)
    out[idx] = set_low(pin_bit);
    idx += 1;
    // Data bits, LSB-first
    let nbits = cfg.data_bits.clamp(5, 8);
    for i in 0..nbits {
        let one = ((data >> i) & 1) != 0;
        out[idx] = if one { set_high(pin_bit) } else { set_low(pin_bit) };
        idx += 1;
    }
    // Parity
    match cfg.parity {
        Parity::None => {}
        Parity::Even | Parity::Odd => {
            let mask: u8 = if nbits == 8 { 0xFF } else { (1u16 << nbits) as u8 - 1 };
            let ones = (data & mask).count_ones() & 1;
            let par_bit_is_one = match cfg.parity {
                Parity::Even => ones == 1,
                Parity::Odd => ones == 0,
                _ => false,
            };
            out[idx] = if par_bit_is_one {
                set_high(pin_bit)
            } else {
                set_low(pin_bit)
            };
            idx += 1;
        }
    }
    // STOP bits (HIGH)
    let stop_ticks = match cfg.stop_bits {
        StopBits::One => 1usize,
        StopBits::Two => 2usize,
    };
    for _ in 0..stop_ticks {
        out[idx] = set_high(pin_bit);
        idx += 1;
    }
    idx
 }
 /// Decode an oversampled stream of logic levels into UART bytes.
 pub fn decode_uart_samples(
    samples: &[u8],
    oversample: u16,
    cfg: &UartConfig,
 ) -> heapless::Vec<u8, 256> {
    let mut out = Vec::<u8, 256>::new();
    let mut idx = 0usize;
    let nbits = cfg.data_bits as usize;
    while idx + (oversample as usize * (nbits + 3)) < samples.len() {
        // Wait for start bit (falling edge: high -> low)
        if samples[idx] != 0 && samples[idx + 1] == 0 {
            // Align to middle of start bit
            idx += (oversample / 2) as usize;
            // Sanity check start bit really low
            if samples.get(idx).copied().unwrap_or(1) != 0 {
                idx += 1;
                continue;
            }
            // Sample data bits
            let mut data: u8 = 0;
            for bit in 0..nbits {
                idx += oversample as usize;
                let bit_val = samples
                    .get(idx)
                    .map(|&b| if b != 0 { 1u8 } else { 0u8 })
                    .unwrap_or(1);
                data |= bit_val << bit;
            }
            // Parity: skip / verify
            match cfg.parity {
                Parity::None => {}
                Parity::Even | Parity::Odd => {
                    idx += oversample as usize;
                    // You can optionally add parity check here if needed
                }
            }
            // Move past stop bits
            let stop_skip = match cfg.stop_bits {
                StopBits::One => oversample as usize,
                StopBits::Two => (oversample * 2) as usize,
            };
            idx += stop_skip;
            // Push decoded byte
            let _ = out.push(data);
        } else {
            idx += 1;
        }
    }
    out
 }
--- a/dma_gpio2/tests/integration.rs
+++ b/dma_gpio2/tests/integration.rs
@@ -0,0 +1,16 @@
 #![no_std]
 #![no_main]
 use stm32u5_blinky as _; // memory layout + panic handler
 // See https://crates.io/crates/defmt-test/0.3.0 for more documentation (e.g. about the 'state'
 // feature)
 #[defmt_test::tests]
 mod tests {
    use defmt::assert;
    #[test]
    fn it_works() {
        assert!(true)
    }
 }
--- a/usart_async_buffered_generalized2/src/bin/main.rs
+++ b/usart_async_buffered_generalized2/src/bin/main.rs
@@ -1,93 +1,51 @@
 // src/bin/main.rs
 #![no_std]
 #![no_main]
 use defmt::*;
 use {defmt_rtt as _, panic_probe as _};
 use embassy_executor::Spawner;
 use embassy_stm32::usart::{BufferedInterruptHandler, BufferedUart, Config};
 use embassy_stm32::bind_interrupts;
 use embassy_stm32::peripherals;
-use embassy_stm32::usart::{BufferedInterruptHandler, BufferedUart, Config};
+use embassy_time::Instant;
 use embedded_io_async::{Read, Write};
 use embassy_time::{Timer, Duration, Instant};
 use static_cell::StaticCell;
 use embassy_futures::yield_now;
 use {defmt_rtt as _, panic_probe as _};
 use embassy_futures::select::{select, Either};
 use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
 use embassy_sync::pipe::Pipe;
 use async_uart::safety::{preflight_and_suggest_yield_period, RX_PIPE_CAP, TX_PIPE_CAP};
-static UART_TX: Pipe<CriticalSectionRawMutex, TX_PIPE_CAP> = Pipe::new();
+use async_uart::uart::usart1;
 static UART_RX: Pipe<CriticalSectionRawMutex, RX_PIPE_CAP> = Pipe::new();
-bind_interrupts!(
+bind_interrupts!(struct Irqs {
-    struct Irqs {
+    USART1 => BufferedInterruptHandler<peripherals::USART1>;
-        USART1 => BufferedInterruptHandler<peripherals::USART1>;
+});
    }
 );
 #[embassy_executor::task]
 async fn uart_task(mut uart: BufferedUart<'static>) {
    let mut rx_byte = [0u8; 1];
    let mut tx_buf = [0u8; 64];
    loop {
        // Wait for either RX or TX events.
        let rx_fut = uart.read(&mut rx_byte);
        let tx_fut = async {
            // Until there's outgoing data in TX pipe
            let n = UART_TX.read(&mut tx_buf).await;
            n
        };
        match select(rx_fut, tx_fut).await {
            // Incoming data from UART hardware
            Either::First(res) => {
                if let Ok(_) = res {
                    // Forward to RX pipe
                    let _ = UART_RX.write(&rx_byte).await;
                    let _ = UART_TX.try_write(&rx_byte);
                }
            }
            // Outgoing data waiting in TX pipe
            Either::Second(n) => {
                unwrap!(uart.write(&tx_buf[..n]).await);
            }
        }
    }
 }
 #[embassy_executor::main]
 async fn main(spawner: Spawner) {
-    info!("tititititi");
+    info!("boot");
    let p = embassy_stm32::init(Default::default());
-    static TX_BUF: StaticCell<[u8; 256]> = StaticCell::new();
+
    static RX_BUF: StaticCell<[u8; 256]> = StaticCell::new();
    let tx_buf = TX_BUF.init([0; 256]);
    let rx_buf = RX_BUF.init([0; 256]);
    let mut cfg = Config::default();
    cfg.baudrate = 230_400;
-    // Call preflight and get the computed yield period
+    static TX_BUF: StaticCell<[u8; 256]> = StaticCell::new();
-    let yield_period = preflight_and_suggest_yield_period(cfg.baudrate);
+    static RX_BUF: StaticCell<[u8; 256]> = StaticCell::new();
-    let usart = BufferedUart::new(
+    let uart = 
-        p.USART1,
+        BufferedUart::new(
-        p.PA10, // RX
+            p.USART1,
-        p.PA9,  // TX
+            p.PA10,
-        tx_buf,
+            p.PA9,
-        rx_buf,
+            TX_BUF.init([0; 256]),
-        Irqs,
+            RX_BUF.init([0; 256]),
-        cfg,
+            Irqs,
-    ).unwrap();
+            cfg,
-    info!("starting uart task");
+        ).unwrap();
-    spawner.spawn(uart_task(usart)).unwrap();
+    let handle = usart1::setup_and_spawn(&spawner, uart, cfg.baudrate);
    let mut counter: u32 = 0;
    let mut rx_buf = [0u8; 64];
    let mut last_yield = Instant::now();
    loop {
-        counter = counter.wrapping_add(1);
+        if let Ok(n) = handle.rx.try_read(&mut rx_buf) {
        // Poll RX pipe for new data (non-blocking)
        if let Ok(n) = UART_RX.try_read(&mut rx_buf) {
            if n > 0 {
                if let Ok(s) = core::str::from_utf8(&rx_buf[..n]) {
                    info!("RX got: {}", s);
@@ -97,13 +55,9 @@ async fn main(spawner: Spawner) {
            }
        }
-        // Guaranteed to yield before ISR RX buffer can overflow
+        if Instant::now().duration_since(last_yield) >= handle.yield_period {
-        if Instant::now().duration_since(last_yield) >= yield_period {
+            embassy_futures::yield_now().await;
            yield_now().await;
            last_yield = Instant::now();
            // info!("Yield mf {}", counter);
        }
        // Timer::after(Duration::from_micros(1)).await;
        // Timer::after(Duration::from_secs(5)).await;
    }
 }
--- a/usart_async_buffered_generalized2/src/lib.rs
+++ b/usart_async_buffered_generalized2/src/lib.rs
@@ -1,2 +1,2 @@
 #![no_std]
-pub mod safety;
+pub mod uart;
--- a/usart_async_buffered_generalized2/src/uart/driver.rs
+++ b/usart_async_buffered_generalized2/src/uart/driver.rs
@@ -0,0 +1,65 @@
 // src/uart/driver.rs
 use defmt::unwrap;
 use embassy_executor::Spawner;
 use embassy_futures::select::{select, Either};
 use embassy_stm32::usart::BufferedUart;
 use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
 use embassy_sync::pipe::Pipe;
 use embassy_time::Duration;
 use embedded_io_async::{Read, Write};
 use crate::uart::safety::{RX_PIPE_CAP, TX_PIPE_CAP};
 pub struct UartHandle {
    pub tx: &'static Pipe<CriticalSectionRawMutex, TX_PIPE_CAP>,
    pub rx: &'static Pipe<CriticalSectionRawMutex, RX_PIPE_CAP>,
    pub yield_period: Duration,
 }
 #[embassy_executor::task]
 pub async fn uart_task(
    mut uart: BufferedUart<'static>,
    tx_pipe: &'static Pipe<CriticalSectionRawMutex, TX_PIPE_CAP>,
    rx_pipe: &'static Pipe<CriticalSectionRawMutex, RX_PIPE_CAP>,
 ) {
    let mut rx_byte = [0u8; 1];
    let mut tx_buf = [0u8; 64];
    loop {
        let rx_fut = uart.read(&mut rx_byte);
        let tx_fut = async {
            let n = tx_pipe.read(&mut tx_buf).await;
            n
        };
        match select(rx_fut, tx_fut).await {
            // Incoming data from UART hardware
            Either::First(res) => {
                if let Ok(_) = res {
                    // Forward to RX pipe and echo to TX pipe (same behavior as before)
                    let _ = rx_pipe.write(&rx_byte).await;
                    let _ = tx_pipe.try_write(&rx_byte);
                }
            }
            // Outgoing data waiting in TX pipe
            Either::Second(n) => {
                unwrap!(uart.write(&tx_buf[..n]).await);
            }
        }
    }
 }
 pub fn spawn_for(
    spawner: &Spawner,
    uart: BufferedUart<'static>,
    tx_pipe: &'static Pipe<CriticalSectionRawMutex, TX_PIPE_CAP>,
    rx_pipe: &'static Pipe<CriticalSectionRawMutex, RX_PIPE_CAP>,
    yield_period: Duration,
 ) -> UartHandle {
    spawner.spawn(uart_task(uart, tx_pipe, rx_pipe)).unwrap();
    UartHandle {
        tx: tx_pipe,
        rx: rx_pipe,
        yield_period,
    }
 }
--- a/usart_async_buffered_generalized2/src/uart/mod.rs
+++ b/usart_async_buffered_generalized2/src/uart/mod.rs
@@ -0,0 +1,4 @@
 // src/uart/mod.rs
 pub mod driver;
 pub mod usart1;
 pub mod safety;
--- a/usart_async_buffered_generalized2/src/uart/safety.rs
+++ b/usart_async_buffered_generalized2/src/uart/safety.rs
--- a/usart_async_buffered_generalized2/src/uart/usart1.rs
+++ b/usart_async_buffered_generalized2/src/uart/usart1.rs
@@ -0,0 +1,23 @@
 // src/uart/usart1.rs
 use defmt::info;
 use embassy_executor::Spawner;
 use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
 use embassy_sync::pipe::Pipe;
 use embassy_time::Duration;
 use crate::uart::safety::{preflight_and_suggest_yield_period, RX_PIPE_CAP, TX_PIPE_CAP};
 use crate::uart::driver::{spawn_for, UartHandle};
 // Static pipes and buffers
 static UART1_TX_PIPE: Pipe<CriticalSectionRawMutex, TX_PIPE_CAP> = Pipe::new();
 static UART1_RX_PIPE: Pipe<CriticalSectionRawMutex, RX_PIPE_CAP> = Pipe::new();
 pub fn setup_and_spawn(
    spawner: &Spawner,
    uart: embassy_stm32::usart::BufferedUart<'static>,
    baudrate: u32,
 ) -> UartHandle {
    let yield_period: Duration = preflight_and_suggest_yield_period(baudrate);
    info!("USART1 initialized");
    spawn_for(spawner, uart, &UART1_TX_PIPE, &UART1_RX_PIPE, yield_period)
 }
Author	SHA1	Message	Date
Priec	3134399c4e	direct solution works	2025-11-06 00:36:38 +01:00
Priec	9358f2e8ec	not working, i have no clue why	2025-11-05 23:40:59 +01:00
Priec	f2fda10c7a	Tx only does not work	2025-11-05 21:03:30 +01:00
Priec	f7fdd72d7f	timer stuff, yield now added, still hard fault error	2025-11-05 16:38:26 +01:00
Priec	41c31f6b2a	only improvements	2025-11-05 14:45:36 +01:00
Priec	d57d16935d	compiled, config in src/config, but i get hardfault crash at runtime	2025-11-05 09:44:41 +01:00
Filipriec	44f154e289	comment	2025-11-04 22:00:34 +01:00
Priec	92e27ad076	Last moves, comments and file organization	2025-11-03 23:26:39 +01:00
Priec	93c43dee11	redesigned, removed redundancy	2025-11-03 22:41:16 +01:00
Priec	096fe5e2b9	working now pushing to the ring buffer	2025-11-02 22:46:42 +01:00
Priec	fef7de2045	working, but data are in pipe, but we read ringbuffer, critical bug, fix now	2025-11-02 22:39:01 +01:00
Priec	15b3b96b68	compiled and working	2025-11-01 23:47:15 +01:00
Priec	4365c72688	complete movement, some parts are destroyed and not moved yet	2025-11-01 23:35:27 +01:00
Priec	63c353faac	adjusted comments	2025-11-01 14:08:27 +01:00
Priec	f24bd73c6b	compiled from main branch working with LLI DMA	2025-10-31 23:04:48 +01:00
Priec	1a4c071417	time for big update from now on	2025-10-31 22:37:23 +01:00
Priec	8ce9ee9f6c	dma Rx working	2025-10-31 17:28:34 +01:00
Priec	28b468902a	Rx is not using dma now	2025-10-31 14:31:25 +01:00
Priec	0ecf821e40	moved properly	2025-10-31 13:19:54 +01:00
Priec	8de34e13d9	solution detached from main for async buffered generalized2	2025-10-31 13:00:21 +01:00
`@@ -1,2 +1,2 @@`
	`#![no_std]`	`#![no_std]`
	`pub mod safety;`	`pub mod uart;`