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Tx only does not work

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Priec
2025-11-05 21:03:30 +01:00
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dma_gpio2/.cargo/config.toml Normal file
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[build]
target = "thumbv8m.main-none-eabihf"
[target.thumbv8m.main-none-eabihf]
runner = "probe-rs run --chip STM32U575ZITxQ"
rustflags = [
"-C", "linker=rust-lld",
"-C", "link-arg=-Tlink.x",
"-C", "link-arg=-Tdefmt.x",
"-C", "link-arg=--nmagic",
]
[package.metadata.cargo-flash]
chip = "STM32U575ZIT"

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/target

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[package]
authors = ["Priec <filippriec@gmail.com>"]
name = "dma_gpio"
edition = "2024"
version = "0.1.0"
[dependencies]
cortex-m = { version = "0.7.7", features = ["inline-asm", "critical-section-single-core"] }
cortex-m-rt = "0.7.5"
panic-halt = "1.0.0"
embassy-executor = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["arch-cortex-m", "executor-thread"] }
embassy-futures = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
embassy-sync = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
embassy-time = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["tick-hz-32_768"] }
embassy-hal-internal = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
embassy-usb = { git = "https://github.com/embassy-rs/embassy.git", branch = "main" }
embassy-stm32 = { git = "https://github.com/embassy-rs/embassy.git", branch = "main", features = ["unstable-pac", "stm32u575zi", "time-driver-tim2", "memory-x", "defmt"] }
embedded-hal = "1.0.0"
embedded-graphics = "0.8.1"
heapless = { version = "0.9.1", default-features = false }
micromath = "2.1.0"
tinybmp = "0.6.0"
panic-probe = { version = "1.0.0", features = ["defmt"] }
defmt-rtt = "1.1.0"
defmt = "1.0.1"
static_cell = "2.1.1"

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Permission is hereby granted, free of charge, to any
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TARGET = thumbv8m.main-none-eabihf
CHIP = STM32U575ZI
BIN = stm32u5-blinky
MODE ?= release
TARGET_DIR = target/$(TARGET)/$(MODE)
ELF = $(TARGET_DIR)/$(BIN)
PROBE = probe-rs
.PHONY: all build flash clean empty
all: build
build:
cargo build --$(MODE)
flash: build
$(PROBE) run --chip $(CHIP) $(ELF)
empty:
$(PROBE) erase --chip $(CHIP)
clean:
cargo clean

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# `app-template`
> Quickly set up a [`probe-rs`] + [`defmt`] + [`flip-link`] embedded project
[`probe-rs`]: https://crates.io/crates/probe-rs
[`defmt`]: https://github.com/knurling-rs/defmt
[`flip-link`]: https://github.com/knurling-rs/flip-link
## Dependencies
### 1. `flip-link`:
```bash
cargo install flip-link
```
### 2. `probe-rs`:
Install probe-rs by following the instructions at <https://probe.rs/docs/getting-started/installation/>.
### 3. [`cargo-generate`]:
```bash
cargo install cargo-generate
```
[`cargo-generate`]: https://crates.io/crates/cargo-generate
> *Note:* You can also just clone this repository instead of using `cargo-generate`, but this involves additional manual adjustments.
## Setup
### 1. Initialize the project template
```bash
cargo generate \
--git https://github.com/knurling-rs/app-template \
--branch main \
--name my-app
```
If you look into your new `my-app` folder, you'll find that there are a few `TODO`s in the files marking the properties you need to set.
Let's walk through them together now.
### 2. Set `probe-rs` chip
Pick a chip from ` probe-rs chip list` and enter it into `.cargo/config.toml`.
If, for example, you have a nRF52840 Development Kit as used in one of [our exercises], replace `{{chip}}` with `nRF52840_xxAA`.
[our workshops]: https://rust-exercises.ferrous-systems.com
```diff
# .cargo/config.toml
-runner = ["probe-rs", "run", "--chip", "$CHIP", "--log-format=oneline"]
+runner = ["probe-rs", "run", "--chip", "nRF52840_xxAA", "--log-format=oneline"]
```
### 3. Adjust the compilation target
In `.cargo/config.toml`, pick the right compilation target for your board.
```diff
# .cargo/config.toml
[build]
-target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
-# target = "thumbv7m-none-eabi" # Cortex-M3
-# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
-# target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
+target = "thumbv7em-none-eabihf" # Cortex-M4F (with FPU)
```
Add the target with `rustup`.
```bash
rustup target add thumbv7em-none-eabihf
```
### 4. Add a HAL as a dependency
In `Cargo.toml`, list the Hardware Abstraction Layer (HAL) for your board as a dependency.
For the nRF52840 you'll want to use the [`nrf52840-hal`].
[`nrf52840-hal`]: https://crates.io/crates/nrf52840-hal
```diff
# Cargo.toml
[dependencies]
-# some-hal = "1.2.3"
+nrf52840-hal = "0.14.0"
```
⚠️ Note for RP2040 users ⚠️
You will need to not just specify the `rp-hal` HAL, but a BSP (board support crate) which includes a second stage bootloader. Please find a list of available BSPs [here](https://github.com/rp-rs/rp-hal-boards#packages).
### 5. Import your HAL
Now that you have selected a HAL, fix the HAL import in `src/lib.rs`
```diff
// my-app/src/lib.rs
-// use some_hal as _; // memory layout
+use nrf52840_hal as _; // memory layout
```
### (6. Get a linker script)
Some HAL crates require that you manually copy over a file called `memory.x` from the HAL to the root of your project. For nrf52840-hal, this is done automatically so no action is needed. For other HAL crates, see their documentation on where to find an example file.
The `memory.x` file should look something like:
```text
MEMORY
{
FLASH : ORIGIN = 0x00000000, LENGTH = 1024K
RAM : ORIGIN = 0x20000000, LENGTH = 256K
}
```
The `memory.x` file is included in the `cortex-m-rt` linker script `link.x`, and so `link.x` is the one you should tell `rustc` to use (see the `.cargo/config.toml` file where we do that).
### 7. Run!
You are now all set to `cargo-run` your first `defmt`-powered application!
There are some examples in the `src/bin` directory.
Start by `cargo run`-ning `my-app/src/bin/hello.rs`:
```console
$ # `rb` is an alias for `run --bin`
$ cargo rb hello
Finished `dev` profile [optimized + debuginfo] target(s) in 0.01s
Running `probe-rs run --chip nrf52840_xxaa --log-format=oneline target/thumbv6m-none-eabi/debug/hello`
Erasing ✔ 100% [####################] 8.00 KiB @ 15.79 KiB/s (took 1s)
Programming ✔ 100% [####################] 8.00 KiB @ 13.19 KiB/s (took 1s) Finished in 1.11s
Hello, world!
$ echo $?
0
```
If you're running out of memory (`flip-link` bails with an overflow error), you can decrease the size of the device memory buffer by setting the `DEFMT_RTT_BUFFER_SIZE` environment variable. The default value is 1024 bytes, and powers of two should be used for optimal performance:
```console
$ DEFMT_RTT_BUFFER_SIZE=64 cargo rb hello
```
### (8. Set `rust-analyzer.linkedProjects`)
If you are using [rust-analyzer] with VS Code for IDE-like features you can add following configuration to your `.vscode/settings.json` to make it work transparently across workspaces. Find the details of this option in the [RA docs].
```json
{
"rust-analyzer.linkedProjects": [
"Cargo.toml",
"firmware/Cargo.toml",
]
}
```
[RA docs]: https://rust-analyzer.github.io/manual.html#configuration
[rust-analyzer]: https://rust-analyzer.github.io/
## Running tests
The template comes configured for running unit tests and integration tests on the target.
Unit tests reside in the library crate and can test private API; the initial set of unit tests are in `src/lib.rs`.
`cargo test --lib` will run those unit tests.
```console
$ cargo test --lib
Compiling example v0.1.0 (./knurling-rs/example)
Finished `test` profile [optimized + debuginfo] target(s) in 0.15s
Running unittests src/lib.rs (target/thumbv6m-none-eabi/debug/deps/example-2b0d0e25d141bf57)
Erasing ✔ 100% [####################] 8.00 KiB @ 15.99 KiB/s (took 1s)
Programming ✔ 100% [####################] 8.00 KiB @ 13.33 KiB/s (took 1s) Finished in 1.10s
(1/1) running `it_works`...
all tests passed!
```
Integration tests reside in the `tests` directory; the initial set of integration tests are in `tests/integration.rs`.
`cargo test --test integration` will run those integration tests.
Note that the argument of the `--test` flag must match the name of the test file in the `tests` directory.
```console
$ cargo test --test integration
Compiling example v0.1.0 (./knurling-rs/example)
Finished `test` profile [optimized + debuginfo] target(s) in 0.10s
Running tests/integration.rs (target/thumbv6m-none-eabi/debug/deps/integration-aaaff41151f6a722)
Erasing ✔ 100% [####################] 8.00 KiB @ 16.03 KiB/s (took 0s)
Programming ✔ 100% [####################] 8.00 KiB @ 13.19 KiB/s (took 1s) Finished in 1.11s
(1/1) running `it_works`...
all tests passed!
```
Note that to add a new test file to the `tests` directory you also need to add a new `[[test]]` section to `Cargo.toml`.
To run all the tests via `cargo test` the tests need to be explicitly disabled for all the existing binary targets.
See `Cargo.toml` for details on how to do this.
## Support
`app-template` is part of the [Knurling] project, [Ferrous Systems]' effort at
improving tooling used to develop for embedded systems.
If you think that our work is useful, consider sponsoring it via [GitHub
Sponsors].
## License
Licensed under either of
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
http://www.apache.org/licenses/LICENSE-2.0)
- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
at your option.
### Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted
for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
licensed as above, without any additional terms or conditions.
[Knurling]: https://knurling.ferrous-systems.com
[Ferrous Systems]: https://ferrous-systems.com/
[GitHub Sponsors]: https://github.com/sponsors/knurling-rs

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// src/bin/main.rs
#![no_std]
#![no_main]
use defmt::*;
use embassy_executor::Spawner;
use embassy_futures::yield_now;
use embassy_stm32::dma::Request;
use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
use embassy_time::{Duration, Timer};
use embassy_stm32::dma::{TransferOptions, WritableRingBuffer};
use dma_gpio::software_uart::{
dma_timer::init_tim6_for_uart,
gpio_dma_uart_tx::encode_uart_frames,
debug::dump_tim6_regs,
};
use dma_gpio::config::{BAUD, TX_PIN_BIT, RX_OVERSAMPLE, TX_OVERSAMPLE};
use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES, PIPE_RX_SIZE};
use static_cell::StaticCell;
use {defmt_rtt as _, panic_probe as _};
// kapitola 17.4.11 - 2 casovace pre 2 DMA
pub const TIM6_UP_REQ: Request = 4; // Table 137: tim6_upd_dma, strana 687 STM32U5xx datasheet
static TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
use core::future::poll_fn;
use core::task::Poll;
async fn wait_for_space<'a, W: embassy_stm32::dma::word::Word>(
ring: &mut embassy_stm32::dma::WritableRingBuffer<'a, W>,
min_free: usize,
) {
poll_fn(|cx| {
let used = ring.len().unwrap_or(0);
let cap = ring.capacity();
if cap - used > min_free {
Poll::Ready(())
} else {
ring.set_waker(cx.waker());
Poll::Pending
}
}).await
}
#[embassy_executor::main]
async fn main(spawner: Spawner) {
let p = embassy_stm32::init(Default::default());
info!("Hehe");
let _rx = Input::new(p.PA3, Pull::Up);
let _tx = Output::new(p.PA2, Level::High, Speed::VeryHigh);
init_tim6_for_uart(p.TIM6, BAUD, TX_OVERSAMPLE);
dump_tim6_regs();
// Safe one-time init from StaticCell
let tx_ring_mem: &mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]);
// Create and start the TX DMA ring in main.
// let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
let mut tx_opts = TransferOptions::default();
tx_opts.half_transfer_ir = true;
tx_opts.complete_transfer_ir = true;
// SAFETY: tx_ring_mem is exclusive
let mut tx_ring = unsafe {
WritableRingBuffer::new(
p.GPDMA1_CH0,
TIM6_UP_REQ,
odr_ptr,
tx_ring_mem,
tx_opts,
)
};
// Start DMA
tx_ring.start();
info!("TX DMA ring started");
let mut frame_buf = [0u32; 4096];
loop {
info!("tick start");
Timer::after(Duration::from_millis(400)).await;
info!("tick end");
let used = encode_uart_frames(TX_PIN_BIT, b"Hello marshmallow\r\n", &mut frame_buf).await;
// Wait for DMA to free space, async style
wait_for_space(&mut tx_ring, used / 2).await;
if let Err(e) = tx_ring.write_exact(&frame_buf[..used]).await {
warn!("DMA ring write error: {:?}", e);
} else {
info!("Frame queued to DMA ring");
}
yield_now().await;
}
}

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// src/config.rs
use crate::software_uart::uart_emulation::{Parity, StopBits, UartConfig};
pub const BAUD: u32 = 9_600;
pub const TX_PIN_BIT: u8 = 2; // PA2
pub const TX_OVERSAMPLE: u16 = 1;
pub const RX_OVERSAMPLE: u16 = 16;
pub const RX_RING_BYTES: usize = 4096;
pub const TX_RING_BYTES: usize = 4096;
pub const PIPE_RX_SIZE: usize = 256;
pub const UART_CFG: UartConfig = UartConfig {
data_bits: 8,
parity: Parity::None,
stop_bits: StopBits::One,
};

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#![no_std]
pub mod software_uart;
pub mod config;

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dma_gpio2/src/software_uart/debug.rs Normal file
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// src/software_uart/debug.rs
use defmt::info;
pub fn dump_tim6_regs() {
use embassy_stm32::pac::timer::TimBasic;
let tim = unsafe { TimBasic::from_ptr(0x4000_1000usize as _) };
let sr = tim.sr().read();
let dier = tim.dier().read();
let cr1 = tim.cr1().read();
let arr = tim.arr().read().arr();
let psc = tim.psc().read();
info!(
"TIM6: CR1.CEN={} DIER.UDE={} SR.UIF={} PSC={} ARR={}",
cr1.cen(),
dier.ude(),
sr.uif(),
psc,
arr
);
}
pub fn dump_dma_ch0_regs() {
use embassy_stm32::pac::gpdma::Gpdma;
let dma = unsafe { Gpdma::from_ptr(0x4002_0000usize as _) };
let ch = dma.ch(0);
let cr = ch.cr().read();
let tr1 = ch.tr1().read();
let tr2 = ch.tr2().read();
let br1 = ch.br1().read();
info!(
"GPDMA1_CH0: EN={} PRIO={} SDW={} DDW={} SINC={} DINC={} REQSEL={} SWREQ={} DREQ={} BNDT={}",
cr.en(),
cr.prio(),
tr1.sdw(),
tr1.ddw(),
tr1.sinc(),
tr1.dinc(),
tr2.reqsel(),
tr2.swreq(),
tr2.dreq(),
br1.bndt()
);
}

49
dma_gpio2/src/software_uart/dma_timer.rs Normal file
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// src/dma_timer.rs
use embassy_stm32::{
peripherals::TIM6,
rcc,
timer::low_level::Timer,
Peri,
};
use core::mem;
use embassy_stm32::timer::BasicInstance;
use embassy_stm32::pac::timer::vals::Urs;
/// Initializes TIM6 to tick at `baud * oversample` frequency.
/// Each TIM6 update event triggers one DMA beat.
pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16) {
rcc::enable_and_reset::<TIM6>();
let ll = Timer::new(tim6);
configure_basic_timer(&ll, baud, oversample);
mem::forget(ll);
}
// Shared internal helper — identical CR1/ARR setup
fn configure_basic_timer<T: BasicInstance>(ll: &Timer<'_, T>, baud: u32, oversample: u16) {
let f_timer = rcc::frequency::<T>().0;
let target = baud.saturating_mul(oversample.max(1) as u32).max(1);
// Compute ARR (prescaler = 0)
let mut arr = (f_timer / target).saturating_sub(1) as u16;
if arr == 0 { arr = 1; }
ll.regs_basic().cr1().write(|w| {
w.set_cen(false);
w.set_opm(false);
w.set_udis(false);
w.set_urs(Urs::ANY_EVENT);
});
ll.regs_basic().psc().write_value(0u16);
ll.regs_basic().arr().write(|w| w.set_arr(arr));
ll.regs_basic().dier().modify(|w| w.set_ude(true));
ll.regs_basic().egr().write(|w| w.set_ug(true));
ll.regs_basic().cr1().write(|w| {
w.set_opm(false);
w.set_cen(true);
w.set_udis(false);
w.set_urs(Urs::ANY_EVENT);
});
}

27
dma_gpio2/src/software_uart/gpio_dma_uart_tx.rs Normal file
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// src/software_uart/gpio_dma_uart_tx.rs
use embassy_futures::yield_now;
use crate::software_uart::uart_emulation::encode_uart_byte_cfg;
use crate::config::UART_CFG;
pub async fn encode_uart_frames<'a>(
pin_bit: u8,
bytes: &[u8],
out_buf: &'a mut [u32],
) -> usize {
let mut offset = 0;
for &b in bytes {
let mut frame = [0u32; 12];
let used = encode_uart_byte_cfg(pin_bit, b, &UART_CFG, &mut frame);
if offset + used <= out_buf.len() {
out_buf[offset..offset + used].copy_from_slice(&frame[..used]);
offset += used;
} else {
break;
}
// cooperative async yield
yield_now().await;
}
offset
}

11
dma_gpio2/src/software_uart/mod.rs Normal file
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// src/software_uart/mod.rs
pub mod gpio_dma_uart_tx;
pub mod dma_timer;
pub mod uart_emulation;
pub mod debug;
pub use gpio_dma_uart_tx::*;
pub use dma_timer::*;
pub use uart_emulation::*;
pub use debug::*;

151
dma_gpio2/src/software_uart/uart_emulation.rs Normal file
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// src/software_uart/uart_emulation.rs
use heapless::Vec;
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Parity {
None,
Even,
Odd,
}
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum StopBits {
One,
Two,
}
#[derive(Clone, Copy, Debug)]
pub struct UartConfig {
pub data_bits: u8,
pub parity: Parity,
pub stop_bits: StopBits,
}
impl Default for UartConfig {
fn default() -> Self {
Self {
data_bits: 8,
parity: Parity::None,
stop_bits: StopBits::One,
}
}
}
/// Encodes one byte into a sequence of GPIO BSRR words
pub fn encode_uart_byte_cfg(
pin_bit: u8,
data: u8,
cfg: &UartConfig,
out: &mut [u32; 12],
) -> usize {
// GPIOx_BSRR register str. 636 kap. 13.4.7
let set_high = |bit: u8| -> u32 { 1u32 << bit };
let set_low = |bit: u8| -> u32 { 0 };
// let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) };
let mut idx = 0usize;
// START bit (LOW)
out[idx] = set_low(pin_bit);
idx += 1;
// Data bits, LSB-first
let nbits = cfg.data_bits.clamp(5, 8);
for i in 0..nbits {
let one = ((data >> i) & 1) != 0;
out[idx] = if one { set_high(pin_bit) } else { set_low(pin_bit) };
idx += 1;
}
// Parity
match cfg.parity {
Parity::None => {}
Parity::Even | Parity::Odd => {
let mask: u8 = if nbits == 8 { 0xFF } else { (1u16 << nbits) as u8 - 1 };
let ones = (data & mask).count_ones() & 1;
let par_bit_is_one = match cfg.parity {
Parity::Even => ones == 1,
Parity::Odd => ones == 0,
_ => false,
};
out[idx] = if par_bit_is_one {
set_high(pin_bit)
} else {
set_low(pin_bit)
};
idx += 1;
}
}
// STOP bits (HIGH)
let stop_ticks = match cfg.stop_bits {
StopBits::One => 1usize,
StopBits::Two => 2usize,
};
for _ in 0..stop_ticks {
out[idx] = set_high(pin_bit);
idx += 1;
}
idx
}
/// Decode an oversampled stream of logic levels into UART bytes.
pub fn decode_uart_samples(
samples: &[u8],
oversample: u16,
cfg: &UartConfig,
) -> heapless::Vec<u8, 256> {
let mut out = Vec::<u8, 256>::new();
let mut idx = 0usize;
let nbits = cfg.data_bits as usize;
while idx + (oversample as usize * (nbits + 3)) < samples.len() {
// Wait for start bit (falling edge: high -> low)
if samples[idx] != 0 && samples[idx + 1] == 0 {
// Align to middle of start bit
idx += (oversample / 2) as usize;
// Sanity check start bit really low
if samples.get(idx).copied().unwrap_or(1) != 0 {
idx += 1;
continue;
}
// Sample data bits
let mut data: u8 = 0;
for bit in 0..nbits {
idx += oversample as usize;
let bit_val = samples
.get(idx)
.map(|&b| if b != 0 { 1u8 } else { 0u8 })
.unwrap_or(1);
data |= bit_val << bit;
}
// Parity: skip / verify
match cfg.parity {
Parity::None => {}
Parity::Even | Parity::Odd => {
idx += oversample as usize;
// You can optionally add parity check here if needed
}
}
// Move past stop bits
let stop_skip = match cfg.stop_bits {
StopBits::One => oversample as usize,
StopBits::Two => (oversample * 2) as usize,
};
idx += stop_skip;
// Push decoded byte
let _ = out.push(data);
} else {
idx += 1;
}
}
out
}

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dma_gpio2/tests/integration.rs Normal file
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#![no_std]
#![no_main]
use stm32u5_blinky as _; // memory layout + panic handler
// See https://crates.io/crates/defmt-test/0.3.0 for more documentation (e.g. about the 'state'
// feature)
#[defmt_test::tests]
mod tests {
use defmt::assert;
#[test]
fn it_works() {
assert!(true)
}
}