filipriec/stm32_rust
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

max frequency fixed it all

Browse Source
This commit is contained in:
Priec
2025-11-19 20:28:24 +01:00
parent 78c85c7982
commit de4e04787b
3 changed files with 28 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
semestralka_1i_rx_dma/src/bin/main.rs
View File

@@ -22,6 +22,7 @@ use dma_gpio::hw_uart_pc::driver::uart_task;
use embassy_stm32::usart::{BufferedUart, Config, BufferedInterruptHandler};
use embassy_stm32::peripherals;
use embassy_stm32::bind_interrupts;
use embassy_stm32::Config as CPUConfig;
use dma_gpio::config::{PIPE_HW_TX, PIPE_HW_RX, PIPE_SW_TX, PIPE_SW_RX};
use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
use dma_gpio::hw_uart_internal::usart2;
@@ -33,7 +34,13 @@ use embassy_time::{Duration, Timer};
use embassy_stm32::pac;
use embassy_stm32::interrupt;
use {defmt_rtt as _, panic_probe as _};
use embassy_stm32::{
rcc::{self, Pll, PllSource},
};
use embassy_stm32::rcc::PllMul;
use embassy_stm32::rcc::PllDiv;
use embassy_stm32::rcc::PllPreDiv;
use embassy_stm32::rcc::Sysclk;
use cortex_m::interrupt::Mutex;
use core::cell::RefCell;
use embassy_sync::channel::Channel;
@@ -56,9 +63,24 @@ static mut RX_PIN: Option<Input<'static>> = None;
#[embassy_executor::main]
async fn main(spawner: Spawner) {
info!("boot");
let p = embassy_stm32::init(Default::default());
info!("init m8");
let mut config = CPUConfig::default();
config.rcc.hsi = true;
config.rcc.sys = Sysclk::PLL1_R;
config.rcc.pll1 = Some(Pll {
source: PllSource::HSI,
// 16 MHz / 1 × 20 / 2 = 160 MHz
prediv: PllPreDiv::DIV1, // or 1.into()
mul: PllMul::MUL20, // or 20.into()
divp: None,
divq: None,
divr: Some(PllDiv::DIV2), // or Some(2.into())
});
config.enable_independent_io_supply = true;
config.enable_independent_analog_supply = true;
let p = embassy_stm32::init(config);
let f_tim7 = rcc::frequency::<embassy_stm32::peripherals::TIM7>().0;
info!("TIM7 clock after PLL config = {} Hz", f_tim7);
// HARDWARE UART to the PC
let mut cfg = Config::default();
@@ -129,9 +151,6 @@ async fn main(spawner: Spawner) {
info!("SW UART RX DMA started");
let f_tim7 = embassy_stm32::rcc::frequency::<embassy_stm32::peripherals::TIM7>().0;
info!("TIM7 clock = {} Hz", f_tim7);
// Process decoded bytes coming from PIPE_SW_RX
let mut buf = [0u8; 64];
loop {
@@ -153,7 +172,7 @@ pub async fn bridge_usart1_rx_to_usart2_tx(
let n = usart1_rx.read(&mut buf).await;
if n > 0 {
let _ = usart2_tx.write(&buf[..n]).await;
info!("bridge USART1 - USART2 sent:{} bytes: {}", n, &buf[..n]);
// info!("bridge USART1 - USART2 sent:{} bytes: {}", n, &buf[..n]);
}
yield_now().await;
}

2
semestralka_1i_rx_dma/src/config.rs
View File

@@ -9,7 +9,7 @@ pub const BAUD: u32 = 9_600;
pub const TX_PIN_BIT: u8 = 0; // PB2
pub const RX_PIN_BIT: u8 = 6; // PC3
pub const TX_OVERSAMPLE: u16 = 1;
pub const RX_OVERSAMPLE: u16 = 16;
pub const RX_OVERSAMPLE: u16 = 13;
pub const RX_RING_BYTES: usize = 32768;
pub const TX_RING_BYTES: usize = 4096;

2
semestralka_1i_rx_dma/src/software_uart/gpio_dma_uart_rx.rs
View File

@@ -65,7 +65,7 @@ pub async fn rx_dma_task(
pipe_rx.write(decoded.as_slice()).await;
for byte in decoded.as_slice() {
info!("DMA BUFFER CHAR: {} (ASCII: {})", *byte, *byte as char);
// info!("DMA BUFFER CHAR: {} (ASCII: {})", *byte, *byte as char);
}
}