compiled ping pong buffer setup

This commit is contained in:
Filipriec
2025-11-07 19:23:00 +01:00
parent 3930716ac3
commit dd978ec65c

View File

@@ -1,78 +1,70 @@
// src/bin/main.rs
#![no_std]
#![no_main]
use defmt::*;
use embassy_executor::Spawner;
use embassy_futures::yield_now;
use embassy_stm32::dma::Request;
use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
use embassy_time::{Duration, Timer};
use embassy_stm32::dma::{TransferOptions, WritableRingBuffer};
use embassy_stm32::dma::{TransferOptions, Transfer, Priority, Request};
use dma_gpio::software_uart::{
dma_timer::init_tim6_for_uart,
gpio_dma_uart_tx::encode_uart_frames,
debug::dump_tim6_regs,
};
use dma_gpio::config::{BAUD, TX_PIN_BIT, RX_OVERSAMPLE, TX_OVERSAMPLE};
use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES, PIPE_RX_SIZE};
use dma_gpio::config::{BAUD, TX_PIN_BIT, TX_OVERSAMPLE};
use static_cell::StaticCell;
use {defmt_rtt as _, panic_probe as _};
// kapitola 17.4.11 - 2 casovace pre 2 DMA
pub const TIM6_UP_REQ: Request = 4; // Table 137: tim6_upd_dma, strana 687 STM32U5xx datasheet
unsafe fn start_dma<'a>(
ch: embassy_hal_internal::Peri<'a, impl embassy_stm32::dma::Channel>,
request: Request,
odr_ptr: *mut u32,
buf: &'a [u32],
opts: TransferOptions,
) -> Transfer<'a> {
// new_write itself is unsafe
unsafe { Transfer::new_write(ch, request, buf, odr_ptr, opts) }
}
static TX_RING: StaticCell<[u32; TX_RING_BYTES]> = StaticCell::new();
pub const TIM6_UP_REQ: Request = 4;
static BUF_A: StaticCell<[u32; 8]> = StaticCell::new();
static BUF_B: StaticCell<[u32; 8]> = StaticCell::new();
#[embassy_executor::main]
async fn main(spawner: Spawner) {
async fn main(_spawner: Spawner) {
let p = embassy_stm32::init(Default::default());
info!("Hehe");
let _rx = Input::new(p.PA3, Pull::Up);
let _tx = Output::new(p.PA2, Level::High, Speed::VeryHigh);
let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
init_tim6_for_uart(p.TIM6, BAUD, TX_OVERSAMPLE);
dump_tim6_regs();
// Safe one-time init from StaticCell
let tx_ring_mem: &mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]);
let buf_a = BUF_A.init([0u32; 8]);
let buf_b = BUF_B.init([0u32; 8]);
// Create and start the TX DMA ring in main.
// let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32;
let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32;
let mut tx_opts = TransferOptions::default();
tx_opts.half_transfer_ir = true;
tx_opts.complete_transfer_ir = true;
let mut opts = TransferOptions::default();
opts.priority = Priority::VeryHigh;
opts.complete_transfer_ir = true;
// SAFETY: tx_ring_mem is exclusive
let mut tx_ring = unsafe {
WritableRingBuffer::new(
p.GPDMA1_CH0,
TIM6_UP_REQ,
odr_ptr,
tx_ring_mem,
tx_opts,
)
};
// Start DMA
tx_ring.start();
info!("TX DMA ring started");
let mut frame_buf = [0u32; 4096];
let mut ch0 = p.GPDMA1_CH0;
let mut using_a = true;
loop {
info!("tick start");
Timer::after(Duration::from_millis(400)).await;
info!("tick end");
let used = encode_uart_frames(TX_PIN_BIT, b"Hello marshmallow\r\n", &mut frame_buf).await;
if let Err(e) = tx_ring.write_exact(&frame_buf[..used]).await {
warn!("DMA ring write error: {:?}", e);
let (dma_buf, cpu_buf) = if using_a {
(&*buf_a, &mut *buf_b)
} else {
info!("Frame queued to DMA ring");
}
(&*buf_b, &mut *buf_a)
};
let used = encode_uart_frames(TX_PIN_BIT, b"Hello marshmallow\r\n", cpu_buf).await;
let transfer = unsafe {
start_dma(ch0.reborrow(), TIM6_UP_REQ, odr_ptr, &dma_buf[..used], opts)
};
transfer.await;
using_a = !using_a;
yield_now().await;
}