diff --git a/semestralka_1/src/bin/main.rs b/semestralka_1/src/bin/main.rs index a4c3a13..06e514f 100644 --- a/semestralka_1/src/bin/main.rs +++ b/semestralka_1/src/bin/main.rs @@ -43,12 +43,12 @@ async fn main(spawner: Spawner) { let tx_ring_mem: &mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]); // Spawn tasks - spawner.spawn(rx_dma_task(p.GPDMA1_CH1, &PIPE_RX, rx_ring).unwrap()); + spawner.spawn(rx_dma_task(p.GPDMA1_CH1, rx_ring, &PIPE_RX).unwrap()); // Create and start the TX DMA ring in main. // let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32; let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32; - spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, tx_ring_mem).unwrap()); + spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, tx_ring_mem, &PIPE_RX).unwrap()); loop { info!("tick start"); diff --git a/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs b/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs index b8170cc..240c3cc 100644 --- a/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs +++ b/semestralka_1/src/software_uart/gpio_dma_uart_rx.rs @@ -21,8 +21,8 @@ pub const TIM7_UP_REQ: Request = 5; #[task] pub async fn rx_dma_task( ch: Peri<'static, GPDMA1_CH1>, - pipe_rx: &'static Pipe, ring: &'static mut [u8], + pipe_rx: &'static Pipe, ) { let gpioa_idr = embassy_stm32::pac::GPIOA.idr().as_ptr() as *mut u8; diff --git a/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs b/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs index d238d03..6f4838e 100644 --- a/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs +++ b/semestralka_1/src/software_uart/gpio_dma_uart_tx.rs @@ -8,7 +8,9 @@ use embassy_stm32::{ use embassy_futures::yield_now; use defmt::info; +use embassy_sync::pipe::Pipe; use crate::config::{TX_PIN_BIT, UART_CFG}; +use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use crate::software_uart::uart_emulation::encode_uart_byte_cfg; pub const TIM6_UP_REQ: Request = 4; @@ -42,6 +44,7 @@ pub async fn tx_dma_task( ch: Peri<'static, GPDMA1_CH0>, odr_ptr: *mut u32, tx_ring_mem: &'static mut [u32], + pipe_rx: &'static Pipe, ) { let mut tx_opts = TransferOptions::default(); tx_opts.half_transfer_ir = true; @@ -62,20 +65,19 @@ pub async fn tx_dma_task( info!("TX DMA ring started"); let mut frame_buf = [0u32; 4096]; + let mut rx_buf = [0u8; 256]; loop { - info!("TX task tick"); - - let used = encode_uart_frames(TX_PIN_BIT, b"Hello marshmallow\r\n", &mut frame_buf).await; - - if used == 0 { - info!("encode_uart_frames() produced 0 words, skipping write"); + let n = pipe_rx.read(&mut rx_buf).await; + if n == 0 { yield_now().await; continue; } - let _ = tx_ring.write_exact(&frame_buf[..used]).await; - + let used = encode_uart_frames(TX_PIN_BIT, &rx_buf[..n], &mut frame_buf).await; + if used > 0 { + let _ = tx_ring.write_exact(&frame_buf[..used]).await; + } yield_now().await; } }