finalized plantuml

semestralka_1_final_crate/software_uart/docs/tx_uml.txt

@@ -0,0 +1,29 @@
+@startuml
+title TX Path: pipe_rx → DMA → GPIOx_BSRR
+
+start
+
+
+
+repeat
+  :n = pipe_rx.read(rx_buf);
+  
+  if (n > 0?) then (ano)
+    :Enkodovanie rx_buf → frame_buf\n(encode_uart_frames);
+    
+    if (used > 0?) then (ano)
+      :TIM6.SR.UIF = false;
+      :Cakanie na TIM6 tick;
+      :TIM6.SR.UIF = false;
+      
+      :DMA Transfer\nframe_buf → GPIOx_BSRR;
+      :Transfer await;
+    endif
+  endif
+  
+  :yield_now();
+
+repeat while (true)
+
+stop
+@enduml