redesigned, removed redundancy

dma_gpio/src/bin/main.rs

@@ -12,7 +12,7 @@ use dma_gpio::software_uart::{
     gpio_dma_uart_tx::{
         write_uart_frames_to_ring, Parity, StopBits, UartConfig, TIM6_UP_REQ,
     },
-    runtime::rx_dma_task,
+    gpio_dma_uart_rx::rx_dma_task,
     debug::dump_tim6_regs,
 };
 use embassy_stm32::dma::{TransferOptions, WritableRingBuffer};

dma_gpio/src/software_uart/gpio_dma_uart_rx.rs

@@ -1,57 +1,39 @@
-// src/gpio_dma_uart_rx.rs
+// src/software_uart/runtime.rs
+use embassy_executor::task;
 use embassy_stm32::{
-    dma::{Request, Transfer, TransferOptions},
+    dma::Request,
     peripherals::GPDMA1_CH1,
     Peri,
 };
+use embassy_stm32::dma::{
+    ReadableRingBuffer as DmaRingRx,
+    TransferOptions,
+};
 use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
 
-// RM0456 tabulka 137
+// datasheet tabulka 137
 pub const TIM7_UP_REQ: Request = 5;
 
-pub struct GpioDmaRx<'d, const N: usize> {
-    ch: Peri<'d, GPDMA1_CH1>,
-    pin_bit: u8,
-    buf: &'d mut [u32; N],
-    opts: TransferOptions,
-    pipe_rx: &'d Pipe<CriticalSectionRawMutex, 256>,
-}
+/// RX DMA task: reads GPIO samples paced by TIM7 and fills PIPE_RX
+#[task]
+pub async fn rx_dma_task(
+    ch: Peri<'static, GPDMA1_CH1>,
+    pipe_rx: &'static Pipe<CriticalSectionRawMutex, 256>,
+    ring: &'static mut [u8],
+) {
+    let gpioa_idr = embassy_stm32::pac::GPIOA.idr().as_ptr() as *mut u8;
 
-impl<'d, const N: usize> GpioDmaRx<'d, N> {
-    pub fn new(
-        ch: Peri<'d, GPDMA1_CH1>,
-        pin_bit: u8,
-        buf: &'d mut [u32; N],
-        pipe_rx: &'d Pipe<CriticalSectionRawMutex, 256>,
-    ) -> Self {
-        Self {
-            ch,
-            pin_bit,
-            buf,
-            opts: TransferOptions::default(),
-            pipe_rx,
-        }
-    }
+    let mut opts = TransferOptions::default();
+    opts.half_transfer_ir = true;
+    opts.complete_transfer_ir = true;
 
-    pub async fn run(&mut self) -> ! {
+    // SAFETY: ring is exclusive to this task
+    let mut rx = unsafe { DmaRingRx::new(ch, TIM7_UP_REQ, gpioa_idr, ring, opts) };
+    rx.start();
+
+    let mut chunk = [0u8; 256];
     loop {
-            let gpioa_idr_addr = embassy_stm32::pac::GPIOA.as_ptr() as *mut u32;
-
-            unsafe {
-                Transfer::new_read(
-                    self.ch.reborrow(),
-                    TIM7_UP_REQ,
-                    gpioa_idr_addr,
-                    &mut self.buf[..],
-                    self.opts,
-                )
-            }
-            .await;
-
-            for &word in self.buf.iter() {
-                let bit_high = ((word >> self.pin_bit) & 1) as u8;
-                self.pipe_rx.write(&[bit_high]).await;
-            }
-        }
+        let _ = rx.read_exact(&mut chunk).await;
+        pipe_rx.write(&chunk).await;
     }
 }

dma_gpio/src/software_uart/mod.rs

@@ -3,11 +3,9 @@
 pub mod gpio_dma_uart_tx;
 pub mod gpio_dma_uart_rx;
 pub mod dma_timer;
-pub mod runtime;
 pub mod debug;
 
 pub use gpio_dma_uart_tx::*;
 pub use gpio_dma_uart_rx::*;
 pub use dma_timer::*;
-pub use runtime::*;
 pub use debug::*;

dma_gpio/src/software_uart/runtime.rs

@@ -1,36 +0,0 @@
-// src/software_uart/runtime.rs
-use embassy_executor::task;
-use embassy_stm32::{
-    peripherals::GPDMA1_CH1,
-    Peri,
-};
-use embassy_stm32::dma::{
-    ReadableRingBuffer as DmaRingRx,
-    TransferOptions,
-};
-use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
-use crate::software_uart::gpio_dma_uart_rx::TIM7_UP_REQ;
-
-/// RX DMA task: reads GPIO samples paced by TIM7 and fills PIPE_RX
-#[task]
-pub async fn rx_dma_task(
-    ch: Peri<'static, GPDMA1_CH1>,
-    pipe_rx: &'static Pipe<CriticalSectionRawMutex, 256>,
-    ring: &'static mut [u8],
-) {
-    let gpioa_idr = embassy_stm32::pac::GPIOA.idr().as_ptr() as *mut u8;
-
-    let mut opts = TransferOptions::default();
-    opts.half_transfer_ir = true;
-    opts.complete_transfer_ir = true;
-
-    // SAFETY: ring is exclusive to this task
-    let mut rx = unsafe { DmaRingRx::new(ch, TIM7_UP_REQ, gpioa_idr, ring, opts) };
-    rx.start();
-
-    let mut chunk = [0u8; 256];
-    loop {
-        let _ = rx.read_exact(&mut chunk).await;
-        pipe_rx.write(&chunk).await;
-    }
-}