solution detached from main for async buffered generalized2
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@@ -25,7 +25,7 @@ static PIPE: Pipe<CriticalSectionRawMutex, 256> = Pipe::new();
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// Baud rate: one TIM6 update equals one UART bit-time
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const BAUD: u32 = 115_200;
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const TX_PIN_BIT: u8 = 2; // PA2
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const OVERSAMPLE: u16 = 6;
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const OVERSAMPLE: u16 = 16;
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const UART_CFG: UartConfig = UartConfig {
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data_bits: 8,
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@@ -125,7 +125,7 @@ async fn dma_tx_task(ch: Peri<'static, GPDMA1_CH0>) {
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{
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Ok(()) => {}
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Err(_) => {
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warn!("DMA timeout: no TIM6 request (wrong DMAMUX req?)");
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warn!("DMA timeout: no TIM6 request");
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dump_tim6_regs();
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dump_dma_ch0_regs();
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}
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@@ -28,7 +28,7 @@ pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16)
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ll.regs_basic().cr1().write(|w| {
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w.set_cen(false);
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w.set_opm(false);
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w.set_udis(false); // boolean field: false = allow UEV
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w.set_udis(false); // boolean field: false = allow UEV
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w.set_urs(Urs::ANY_EVENT); // enum field: DMA+interrupts on any event
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});
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@@ -47,5 +47,5 @@ pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16)
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w.set_udis(false);
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w.set_urs(Urs::ANY_EVENT);
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});
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mem::forget(ll);
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mem::forget(ll); // KEEP THE TIMER ALIVE
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}
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