solution detached from main for async buffered generalized2

This commit is contained in:
Priec
2025-10-31 13:00:21 +01:00
parent 457d783d3b
commit 8de34e13d9
7 changed files with 125 additions and 77 deletions

View File

@@ -25,7 +25,7 @@ static PIPE: Pipe<CriticalSectionRawMutex, 256> = Pipe::new();
// Baud rate: one TIM6 update equals one UART bit-time
const BAUD: u32 = 115_200;
const TX_PIN_BIT: u8 = 2; // PA2
const OVERSAMPLE: u16 = 6;
const OVERSAMPLE: u16 = 16;
const UART_CFG: UartConfig = UartConfig {
data_bits: 8,
@@ -125,7 +125,7 @@ async fn dma_tx_task(ch: Peri<'static, GPDMA1_CH0>) {
{
Ok(()) => {}
Err(_) => {
warn!("DMA timeout: no TIM6 request (wrong DMAMUX req?)");
warn!("DMA timeout: no TIM6 request");
dump_tim6_regs();
dump_dma_ch0_regs();
}

View File

@@ -28,7 +28,7 @@ pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16)
ll.regs_basic().cr1().write(|w| {
w.set_cen(false);
w.set_opm(false);
w.set_udis(false); // boolean field: false = allow UEV
w.set_udis(false); // boolean field: false = allow UEV
w.set_urs(Urs::ANY_EVENT); // enum field: DMA+interrupts on any event
});
@@ -47,5 +47,5 @@ pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16)
w.set_udis(false);
w.set_urs(Urs::ANY_EVENT);
});
mem::forget(ll);
mem::forget(ll); // KEEP THE TIMER ALIVE
}