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using correct pipes now

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Priec
2025-11-12 14:15:33 +01:00
parent 2fb198ceb8
commit 829cff872f
3 changed files with 18 additions and 25 deletions
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23
semestralka_1/src/bin/main.rs
View File

@@ -20,7 +20,6 @@ use static_cell::StaticCell;
use embassy_futures::yield_now; use embassy_futures::yield_now;
use dma_gpio::hw_uart_pc::usart1; use dma_gpio::hw_uart_pc::usart1;
use dma_gpio::hw_uart_pc::driver::uart_task; use dma_gpio::hw_uart_pc::driver::uart_task;
use dma_gpio::hw_uart_pc::driver::UartHandle;
use embassy_stm32::usart::{BufferedUart, Config, BufferedInterruptHandler}; use embassy_stm32::usart::{BufferedUart, Config, BufferedInterruptHandler};
use embassy_stm32::peripherals; use embassy_stm32::peripherals;
use embassy_stm32::bind_interrupts; use embassy_stm32::bind_interrupts;
@@ -57,8 +56,8 @@ async fn main(spawner: Spawner) {
Irqs, Irqs,
cfg, cfg,
).unwrap(); ).unwrap();
let (handle, yield_period) = usart1::setup_and_spawn(BAUD); let yield_period = usart1::setup_and_spawn(BAUD);
spawner.spawn(uart_task(uart, handle.tx, handle.rx).unwrap()); spawner.spawn(uart_task(uart, &PIPE_HW_TX, &PIPE_HW_RX).unwrap());
// END OF HARDWARE UART to the PC // END OF HARDWARE UART to the PC
// SOFTWARE UART // SOFTWARE UART
@@ -92,12 +91,22 @@ async fn main(spawner: Spawner) {
info!("tick start"); info!("tick start");
// Timer::after(Duration::from_millis(100)).await; // Timer::after(Duration::from_millis(100)).await;
// info!("tick end"); // info!("tick end");
let n = handle.rx.read(&mut buf).await;
if n > 0 { let n1 = PIPE_HW_RX.read(&mut buf).await;
info!("PC received: {:a}", &buf[..n]); if n1 > 0 {
info!("PC received: {:a}", &buf[..n1]);
}
if n1 > 0 {
let _ = PIPE_SW_TX.write(&buf[..n1]).await;
info!("SW UART TX sent echo: {:a}", &buf[..n1]);
} }
if Instant::now().duration_since(last_yield) >= handle.yield_period { let n2 = PIPE_SW_RX.read(&mut buf).await;
if n2 > 0 {
info!("SW UART RX received: {:a}", &buf[..n2]);
}
if Instant::now().duration_since(last_yield) >= yield_period {
yield_now().await; yield_now().await;
last_yield = Instant::now(); last_yield = Instant::now();
} }

8
semestralka_1/src/hw_uart_pc/driver.rs
View File

@@ -4,17 +4,9 @@ use embassy_futures::select::{select, Either};
use embassy_stm32::usart::BufferedUart; use embassy_stm32::usart::BufferedUart;
use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
use embassy_sync::pipe::Pipe; use embassy_sync::pipe::Pipe;
use embassy_time::Duration;
use embedded_io_async::{Read, Write}; use embedded_io_async::{Read, Write};
use crate::hw_uart_pc::safety::{RX_PIPE_CAP, TX_PIPE_CAP}; use crate::hw_uart_pc::safety::{RX_PIPE_CAP, TX_PIPE_CAP};
pub struct UartHandle {
pub tx: &'static Pipe<CriticalSectionRawMutex, TX_PIPE_CAP>,
pub rx: &'static Pipe<CriticalSectionRawMutex, RX_PIPE_CAP>,
pub yield_period: Duration,
}
#[embassy_executor::task] #[embassy_executor::task]
pub async fn uart_task( pub async fn uart_task(
mut uart: BufferedUart<'static>, mut uart: BufferedUart<'static>,

12
semestralka_1/src/hw_uart_pc/usart1.rs
View File

@@ -3,18 +3,10 @@ use defmt::info;
use embassy_time::Duration; use embassy_time::Duration;
use crate::hw_uart_pc::safety::preflight_and_suggest_yield_period; use crate::hw_uart_pc::safety::preflight_and_suggest_yield_period;
use crate::hw_uart_pc::driver::UartHandle;
use crate::config::{PIPE_HW_TX, PIPE_HW_RX};
pub fn setup_and_spawn(baudrate: u32,) -> (UartHandle, Duration) { pub fn setup_and_spawn(baudrate: u32,) -> Duration {
let yield_period: Duration = preflight_and_suggest_yield_period(baudrate); let yield_period: Duration = preflight_and_suggest_yield_period(baudrate);
info!("HW USART1 safe"); info!("HW USART1 safe");
let handle = UartHandle { yield_period
tx: &PIPE_HW_TX,
rx: &PIPE_HW_RX,
yield_period,
};
(handle, yield_period)
} }