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jsut minor changes, UNTESTED DMA TIMER CHANGE

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Priec
2025-11-20 13:28:09 +01:00
parent 179bec6ed6
commit 685067a75f
5 changed files with 21 additions and 26 deletions
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3
semestralka_1_connected/src/software_uart/dma_timer.rs
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@@ -39,7 +39,8 @@ fn configure_basic_timer<T: BasicInstance>(ll: &Timer<'_, T>, baud: u32, oversam
let target = baud.saturating_mul(oversample.max(1) as u32).max(1);
// Compute ARR (prescaler = 0)
let mut arr = (f_timer / target).saturating_sub(1) as u16;
// let mut arr = (f_timer / target).saturating_sub(1) as u16;
let mut arr = ((f_timer + target / 2) / target).saturating_sub(1) as u16;
if arr == 0 { arr = 1; }
ll.regs_basic().cr1().write(|w| {