adjusted comments

dma_gpio/src/bin/main.rs

@@ -119,29 +119,29 @@ async fn main(spawner: Spawner) {
 
 #[embassy_executor::task]
 async fn rx_dma_task(ch: Peri<'static, GPDMA1_CH1>) {
-
+    // SAFETY Own the static RX buffer exclusively.
-    // SAFETY: this task owns the ring buffer exclusively (Rust 2024: avoid &mut static directly).
     let ring_ptr = core::ptr::addr_of_mut!(RX_RING);
     let ring = unsafe { &mut *ring_ptr };
 
-    // Sample the low byte of GPIOA.IDR (PA0..PA7). PA3 is bit 3, so that's within this byte.
+    // DMA will read samples from GPIOA input register.
-    let idr_low_byte = embassy_stm32::pac::GPIOA.idr().as_ptr() as *mut u8;
+    // Each sample is one byte (PA0..PA7). PA3 lives in bit 3.
+    let gpioa_idr = embassy_stm32::pac::GPIOA.idr().as_ptr() as *mut u8;
 
     let mut opts = TransferOptions::default();
-    // Enable HT/TC IRQ so read_exact can await naturally.
+    opts.half_transfer_ir = true;      // wake at half buffer
-    opts.half_transfer_ir = true;
+    opts.complete_transfer_ir = true;  // wake at full buffer
-    opts.complete_transfer_ir = true;
 
     // Start hardware-linked circular DMA into ring.
-    let mut rx = unsafe { DmaRingRx::new(ch, TIM7_UP_REQ, idr_low_byte, ring, opts) };
+    let mut rx = unsafe { DmaRingRx::new(ch, TIM7_UP_REQ, gpioa_idr, ring, opts) };
     rx.start();
 
-    // Drain in fixed chunks when CPU has time; DMA keeps running regardless.
+    // Drain in fixed chunks when CPU has time
     let mut chunk = [0u8; 256];
     loop {
-        // Wait for a full chunk; wakes on half/full buffer events
+        // Wait for a full chunk
+        // Wakes on half/full buffer events
         let _ = rx.read_exact(&mut chunk).await;
-        // Forward raw samples to PIPE_RX (decode later if desired)
+        // Forward raw samples to PIPE_RX (decode later)
         PIPE_RX.write(&chunk).await;
     }
 }