From 516309aed26959002e8e67219e96e24fb7ca54f5 Mon Sep 17 00:00:00 2001
From: Priec <filippriec@gmail.com>
Date: Tue, 18 Nov 2025 22:56:28 +0100
Subject: [PATCH] proper printing of the pipe_int tx_pipe

---
 semestralka_1d_rx_bez_dma/Cargo.lock      |  8 ++++----
 semestralka_1d_rx_bez_dma/src/bin/main.rs | 15 ++++++---------
 2 files changed, 10 insertions(+), 13 deletions(-)

diff --git a/semestralka_1d_rx_bez_dma/Cargo.lock b/semestralka_1d_rx_bez_dma/Cargo.lock
index fdfde1a..b12cb20 100644
--- a/semestralka_1d_rx_bez_dma/Cargo.lock
+++ b/semestralka_1d_rx_bez_dma/Cargo.lock
@@ -1064,17 +1064,17 @@ dependencies = [
 
 [[package]]
 name = "stm32-fmc"
-version = "0.4.0"
+version = "0.3.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "72692594faa67f052e5e06dd34460951c21e83bc55de4feb8d2666e2f15480a2"
+checksum = "c7f0639399e2307c2446c54d91d4f1596343a1e1d5cab605b9cce11d0ab3858c"
 dependencies = [
- "embedded-hal 1.0.0",
+ "embedded-hal 0.2.7",
 ]
 
 [[package]]
 name = "stm32-metapac"
 version = "18.0.0"
-source = "git+https://github.com/embassy-rs/stm32-data-generated?tag=stm32-data-22374e3344a2c9150b9b3d4da45c03f398fdc54e#31546499ddabe97044beae13ca8b535575b52a56"
+source = "git+https://github.com/embassy-rs/stm32-data-generated?tag=stm32-data-b9f6b0c542d85ee695d71c35ced195e0cef51ac0#9b8fb67703361e2237b6c1ec4f1ee5949223d412"
 dependencies = [
  "cortex-m",
  "cortex-m-rt",
diff --git a/semestralka_1d_rx_bez_dma/src/bin/main.rs b/semestralka_1d_rx_bez_dma/src/bin/main.rs
index b183883..d7a02dc 100644
--- a/semestralka_1d_rx_bez_dma/src/bin/main.rs
+++ b/semestralka_1d_rx_bez_dma/src/bin/main.rs
@@ -121,10 +121,7 @@ async fn main(spawner: Spawner) {
         while !tim6_regs.sr().read().uif() {
             yield_now().await;
         }
-        // Clear interrupt flag
         tim6_regs.sr().modify(|w| w.set_uif(false));
-
-        // Sample PD6 level
         let bit = rx_pin.is_high();
         levels[idx] = bit as u8;
         idx += 1;
@@ -138,11 +135,11 @@ async fn main(spawner: Spawner) {
             idx = 0;
         }
 
-        let n1 = PIPE_INT_TX.read(&mut buf).await;
-        if n1 > 0 {
-            info!("PIPE_INT_TX received: {:a}", &buf[..n1]);
-        }
-        
+        // let n1 = PIPE_INT_TX.read(&mut buf).await;
+        // if n1 > 0 {
+        //     info!("PIPE_INT_TX received: {:a}", &buf[..n1]);
+        // }
+
         Timer::after(Duration::from_millis(1)).await;
         yield_now().await;
     }
@@ -174,7 +171,7 @@ pub async fn bridge_usart2_rx_to_usart1_tx(
         let n = usart2_rx.read(&mut buf).await;
         if n > 0 {
             let _ = usart1_tx.write(&buf[..n]).await;
-            // info!("bridge: USART2 -> USART1 sent {} bytes", n);
+            info!("Buffer USART2 -> USART1 bytes: {:?}", &buf[..n]);
         }
         yield_now().await;
     }