FINAL FIX WORKING OH MY GOSH YES, We have to leak the timer to keep it toggled on after going out of scope to not call destructor
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@@ -6,12 +6,14 @@ use embassy_stm32::{
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timer::low_level::Timer,
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Peri,
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};
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use core::mem;
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use embassy_stm32::pac::timer::vals::Urs;
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/// Initializes TIM6 to tick at `baud * oversample` frequency.
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/// Each TIM6 update event triggers one DMA beat.
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pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16) {
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rcc::enable_and_reset::<TIM6>();
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let ll = Timer::new(tim6);
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let f_tim6 = rcc::frequency::<TIM6>().0;
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@@ -45,4 +47,5 @@ pub fn init_tim6_for_uart<'d>(tim6: Peri<'d, TIM6>, baud: u32, oversample: u16)
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w.set_udis(false);
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w.set_urs(Urs::ANY_EVENT);
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});
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mem::forget(ll);
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}
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