From 41c31f6b2a17b58ece07a47a7033b74040458dda Mon Sep 17 00:00:00 2001 From: Priec Date: Wed, 5 Nov 2025 14:45:36 +0100 Subject: [PATCH] only improvements --- dma_gpio/src/bin/main.rs | 20 ++++++++++--------- .../src/software_uart/gpio_dma_uart_rx.rs | 4 ++-- .../src/software_uart/gpio_dma_uart_tx.rs | 6 +++--- dma_gpio/src/software_uart/uart_emulation.rs | 3 ++- 4 files changed, 18 insertions(+), 15 deletions(-) diff --git a/dma_gpio/src/bin/main.rs b/dma_gpio/src/bin/main.rs index bd76645..e775a0e 100644 --- a/dma_gpio/src/bin/main.rs +++ b/dma_gpio/src/bin/main.rs @@ -14,7 +14,7 @@ use dma_gpio::software_uart::{ gpio_dma_uart_rx::rx_dma_task, debug::dump_tim6_regs, }; -use dma_gpio::config::{BAUD, TX_PIN_BIT, RX_OVERSAMPLE, TX_OVERSAMPLE, UART_CFG}; +use dma_gpio::config::{BAUD, TX_PIN_BIT, RX_OVERSAMPLE, TX_OVERSAMPLE}; use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES, PIPE_RX_SIZE}; use static_cell::StaticCell; use {defmt_rtt as _, panic_probe as _}; @@ -38,14 +38,14 @@ async fn main(spawner: Spawner) { // Safe one-time init from StaticCell let rx_ring: &mut [u8; RX_RING_BYTES] = RX_RING.init([0; RX_RING_BYTES]); - let tx_ring_mem: &mut [u32; TX_RING_BYTES] = - TX_RING.init([0; TX_RING_BYTES]); + let tx_ring_mem: &mut [u32; TX_RING_BYTES] = TX_RING.init([0; TX_RING_BYTES]); // Spawn tasks spawner.spawn(rx_dma_task(p.GPDMA1_CH1, &PIPE_RX, rx_ring).unwrap()); // Create and start the TX DMA ring in main. - let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32; + // let bsrr_ptr = embassy_stm32::pac::GPIOA.bsrr().as_ptr() as *mut u32; + let odr_ptr = embassy_stm32::pac::GPIOA.odr().as_ptr() as *mut u32; let mut tx_opts = TransferOptions::default(); tx_opts.half_transfer_ir = true; tx_opts.complete_transfer_ir = true; @@ -55,7 +55,7 @@ async fn main(spawner: Spawner) { WritableRingBuffer::new( p.GPDMA1_CH0, TIM6_UP_REQ, - bsrr_ptr, + odr_ptr, tx_ring_mem, tx_opts, ) @@ -65,13 +65,15 @@ async fn main(spawner: Spawner) { info!("TX DMA ring started"); loop { + info!("tick start"); + Timer::after(Duration::from_millis(100)).await; + info!("tick end"); write_uart_frames_to_ring( &mut tx_ring, TX_PIN_BIT, b"Hello marshmallow\r\n", - &UART_CFG, - ) - .await; - Timer::after(Duration::from_secs(2)).await; + ).await; + info!("text"); + Timer::after(Duration::from_secs(1)).await; } } diff --git a/dma_gpio/src/software_uart/gpio_dma_uart_rx.rs b/dma_gpio/src/software_uart/gpio_dma_uart_rx.rs index f3d5a6c..d1d1723 100644 --- a/dma_gpio/src/software_uart/gpio_dma_uart_rx.rs +++ b/dma_gpio/src/software_uart/gpio_dma_uart_rx.rs @@ -6,7 +6,7 @@ use embassy_stm32::{ Peri, }; use embassy_stm32::dma::{ - ReadableRingBuffer as DmaRingRx, + ReadableRingBuffer, TransferOptions, }; use crate::config::{RX_OVERSAMPLE, UART_CFG}; @@ -30,7 +30,7 @@ pub async fn rx_dma_task( opts.complete_transfer_ir = true; // SAFETY: ring is exclusive to this task - let mut rx = unsafe { DmaRingRx::new(ch, TIM7_UP_REQ, gpioa_idr, ring, opts) }; + let mut rx = unsafe { ReadableRingBuffer::new(ch, TIM7_UP_REQ, gpioa_idr, ring, opts) }; rx.start(); let mut chunk = [0u8; 256]; diff --git a/dma_gpio/src/software_uart/gpio_dma_uart_tx.rs b/dma_gpio/src/software_uart/gpio_dma_uart_tx.rs index a1f1e9e..3383897 100644 --- a/dma_gpio/src/software_uart/gpio_dma_uart_tx.rs +++ b/dma_gpio/src/software_uart/gpio_dma_uart_tx.rs @@ -1,7 +1,8 @@ // src/software_uart/gpio_dma_uart_tx.rs use embassy_stm32::dma::Request; use embassy_stm32::dma::WritableRingBuffer; -use crate::software_uart::uart_emulation::{UartConfig, encode_uart_byte_cfg}; +use crate::software_uart::uart_emulation::encode_uart_byte_cfg; +use crate::config::UART_CFG; // kapitola 17.4.11 - 2 casovace pre 2 DMA pub const TIM6_UP_REQ: Request = 4; // Table 137: tim6_upd_dma, strana 687 STM32U5xx datasheet @@ -11,11 +12,10 @@ pub async fn write_uart_frames_to_ring( ring: &mut WritableRingBuffer<'static, u32>, pin_bit: u8, bytes: &[u8], - cfg: &UartConfig, ) { for &b in bytes { let mut frame = [0u32; 12]; - let used = encode_uart_byte_cfg(pin_bit, b, cfg, &mut frame); + let used = encode_uart_byte_cfg(pin_bit, b, &UART_CFG, &mut frame); // Will wait until all words are written ring.write_exact(&frame[..used]).await.unwrap(); diff --git a/dma_gpio/src/software_uart/uart_emulation.rs b/dma_gpio/src/software_uart/uart_emulation.rs index 085dc7d..8d677e5 100644 --- a/dma_gpio/src/software_uart/uart_emulation.rs +++ b/dma_gpio/src/software_uart/uart_emulation.rs @@ -40,7 +40,8 @@ pub fn encode_uart_byte_cfg( ) -> usize { // GPIOx_BSRR register str. 636 kap. 13.4.7 let set_high = |bit: u8| -> u32 { 1u32 << bit }; - let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) }; + let set_low = |bit: u8| -> u32 { 0 }; + // let set_low = |bit: u8| -> u32 { 1u32 << (bit as u32 + 16) }; let mut idx = 0usize;