improvements to semestralka 2
This commit is contained in:
@@ -12,12 +12,17 @@ pub fn enter_standby() -> ! {
|
||||
cortex_m::asm::udf(); // never happen marker
|
||||
}
|
||||
|
||||
pub fn enter_standby_with_sram2_retention() -> ! {
|
||||
sram2_retention();
|
||||
pub fn enter_standby_with_sram2_8kb() -> ! {
|
||||
sram2_8kb_retention();
|
||||
enter_standby();
|
||||
}
|
||||
|
||||
pub fn sram2_retention() {
|
||||
pub fn enter_standby_with_sram2_full() -> ! {
|
||||
sram2_full_retention();
|
||||
enter_standby();
|
||||
}
|
||||
|
||||
pub fn sram2_full_retention() {
|
||||
unsafe extern "C" {
|
||||
fn HAL_PWREx_EnableSRAM2ContentStandbyRetention(sram2_pages: u32);
|
||||
}
|
||||
@@ -25,18 +30,29 @@ pub fn sram2_retention() {
|
||||
unsafe {
|
||||
// 0x60 = PWR_SRAM2_FULL_STANDBY = PWR_CR1_RRSB1 | PWR_CR1_RRSB2
|
||||
// See: STM32U5xx HAL: stm32u5xx_hal_pwr_ex.h line 227
|
||||
// CMSIS: PWR_CR1_RRSB1=0x20, PWR_CR1_RRSB2=0x40
|
||||
// PWR_CR1_RRSB1=0x20, PWR_CR1_RRSB2=0x40
|
||||
HAL_PWREx_EnableSRAM2ContentStandbyRetention(0x60);
|
||||
}
|
||||
}
|
||||
|
||||
pub fn disable_sram2_retention() {
|
||||
pub fn sram2_8kb_retention() {
|
||||
unsafe extern "C" {
|
||||
fn HAL_PWREx_EnableSRAM2ContentStandbyRetention(sram2_pages: u32);
|
||||
}
|
||||
|
||||
unsafe {
|
||||
// 0x40 = PWR_SRAM2_PAGE1_STANDBY = PWR_CR1_RRSB2
|
||||
// 8KB retention only
|
||||
HAL_PWREx_EnableSRAM2ContentStandbyRetention(0x40);
|
||||
}
|
||||
}
|
||||
|
||||
pub fn disable_sram2_full_retention() {
|
||||
unsafe extern "C" {
|
||||
fn HAL_PWREx_DisableSRAM2ContentStandbyRetention(sram2_pages: u32);
|
||||
}
|
||||
|
||||
unsafe {
|
||||
// Disable full SRAM2 retention
|
||||
HAL_PWREx_DisableSRAM2ContentStandbyRetention(0x60);
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user