fully built, time to make it work

semestralka_1/src/bin/main.rs

@@ -5,6 +5,7 @@
 use defmt::*;
 use embassy_executor::Spawner;
 use embassy_time::Instant;
+use embassy_executor::task;
 use embassy_stm32::dma::Request;
 use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
 use dma_gpio::software_uart::{
@@ -19,10 +20,12 @@ use static_cell::StaticCell;
 use embassy_futures::yield_now;
 use dma_gpio::hw_uart_pc::usart1;
 use dma_gpio::hw_uart_pc::driver::uart_task;
+use dma_gpio::hw_uart_pc::driver::UartHandle;
 use embassy_stm32::usart::{BufferedUart, Config, BufferedInterruptHandler};
 use embassy_stm32::peripherals;
 use embassy_stm32::bind_interrupts;
-use dma_gpio::config::{PIPE_SW_TX, PIPE_SW_RX};
+use dma_gpio::config::{PIPE_HW_TX, PIPE_HW_RX, PIPE_SW_TX, PIPE_SW_RX};
+use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
 use {defmt_rtt as _, panic_probe as _};
 
 bind_interrupts!(struct Irqs {
@@ -76,6 +79,12 @@ async fn main(spawner: Spawner) {
     spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, sw_tx_ring, &PIPE_SW_TX).unwrap());
     // EDN OF SOFTWARE UART 
 
+
+    // BRIDGE
+    spawner.spawn(bridge_hw_to_sw(&PIPE_HW_RX, &PIPE_SW_TX).unwrap());
+    spawner.spawn(bridge_sw_to_hw(&PIPE_SW_RX, &PIPE_HW_TX).unwrap());
+    // END OF BRIDGE
+    
     let mut last_yield = Instant::now();
     let mut buf = [0u8; 32];
 
@@ -95,3 +104,31 @@ async fn main(spawner: Spawner) {
 
     }
 }
+
+#[task]
+pub async fn bridge_hw_to_sw(
+    hw_rx: &'static Pipe<CriticalSectionRawMutex, 1024>,
+    sw_tx: &'static Pipe<CriticalSectionRawMutex, 1024>,
+) {
+    let mut buf = [0u8; 64];
+    loop {
+        let n = hw_rx.read(&mut buf).await;
+        if n > 0 {
+            let _ = sw_tx.write(&buf[..n]).await;
+        }
+    }
+}
+
+#[task]
+pub async fn bridge_sw_to_hw(
+    sw_rx: &'static Pipe<CriticalSectionRawMutex, 1024>,
+    hw_tx: &'static Pipe<CriticalSectionRawMutex, 1024>,
+) {
+    let mut buf = [0u8; 64];
+    loop {
+        let n = sw_rx.read(&mut buf).await;
+        if n > 0 {
+            let _ = hw_tx.write(&buf[..n]).await;
+        }
+    }
+}

semestralka_1/src/config.rs

@@ -13,8 +13,8 @@ pub const TX_RING_BYTES: usize = 4096;
 
 pub const PIPE_HW_TX_SIZE: usize = 1024;
 pub const PIPE_HW_RX_SIZE: usize = 1024;
-pub const PIPE_SW_TX_SIZE: usize = 256;
+pub const PIPE_SW_TX_SIZE: usize = 1024;
-pub const PIPE_SW_RX_SIZE: usize = 256;
+pub const PIPE_SW_RX_SIZE: usize = 1024;
 
 pub static PIPE_HW_TX: Pipe<CriticalSectionRawMutex, PIPE_HW_TX_SIZE> = Pipe::new();
 pub static PIPE_HW_RX: Pipe<CriticalSectionRawMutex, PIPE_HW_RX_SIZE> = Pipe::new();

semestralka_1/src/software_uart/gpio_dma_uart_rx.rs

@@ -22,7 +22,7 @@ pub const TIM7_UP_REQ: Request = 5;
 pub async fn rx_dma_task(
     ch: Peri<'static, GPDMA1_CH1>,
     ring: &'static mut [u8],
-    pipe_rx: &'static Pipe<CriticalSectionRawMutex, 256>,
+    pipe_rx: &'static Pipe<CriticalSectionRawMutex, 1024>,
 ) {
     let gpioa_idr = embassy_stm32::pac::GPIOA.idr().as_ptr() as *mut u8;
 

semestralka_1/src/software_uart/gpio_dma_uart_tx.rs

@@ -44,7 +44,7 @@ pub async fn tx_dma_task(
     ch: Peri<'static, GPDMA1_CH0>,
     odr_ptr: *mut u32,
     tx_ring_mem: &'static mut [u32],
-    pipe_rx: &'static Pipe<CriticalSectionRawMutex, 256>,
+    pipe_rx: &'static Pipe<CriticalSectionRawMutex, 1024>,
 ) {
     let mut tx_opts = TransferOptions::default();
     tx_opts.half_transfer_ir = true;