From 24d1da44aa398eae89d45edbd888ae766772e580 Mon Sep 17 00:00:00 2001 From: Priec Date: Wed, 19 Nov 2025 21:12:41 +0100 Subject: [PATCH] working at the baud rate 600 --- semestralka_1e_tx_bez_dma/Cargo.lock | 8 +++---- semestralka_1e_tx_bez_dma/src/bin/main.rs | 28 +++++++++++++++-------- semestralka_1e_tx_bez_dma/src/config.rs | 2 +- 3 files changed, 23 insertions(+), 15 deletions(-) diff --git a/semestralka_1e_tx_bez_dma/Cargo.lock b/semestralka_1e_tx_bez_dma/Cargo.lock index fdfde1a..b12cb20 100644 --- a/semestralka_1e_tx_bez_dma/Cargo.lock +++ b/semestralka_1e_tx_bez_dma/Cargo.lock @@ -1064,17 +1064,17 @@ dependencies = [ [[package]] name = "stm32-fmc" -version = "0.4.0" +version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "72692594faa67f052e5e06dd34460951c21e83bc55de4feb8d2666e2f15480a2" +checksum = "c7f0639399e2307c2446c54d91d4f1596343a1e1d5cab605b9cce11d0ab3858c" dependencies = [ - "embedded-hal 1.0.0", + "embedded-hal 0.2.7", ] [[package]] name = "stm32-metapac" version = "18.0.0" -source = "git+https://github.com/embassy-rs/stm32-data-generated?tag=stm32-data-22374e3344a2c9150b9b3d4da45c03f398fdc54e#31546499ddabe97044beae13ca8b535575b52a56" +source = "git+https://github.com/embassy-rs/stm32-data-generated?tag=stm32-data-b9f6b0c542d85ee695d71c35ced195e0cef51ac0#9b8fb67703361e2237b6c1ec4f1ee5949223d412" dependencies = [ "cortex-m", "cortex-m-rt", diff --git a/semestralka_1e_tx_bez_dma/src/bin/main.rs b/semestralka_1e_tx_bez_dma/src/bin/main.rs index b72aff2..1663cf5 100644 --- a/semestralka_1e_tx_bez_dma/src/bin/main.rs +++ b/semestralka_1e_tx_bez_dma/src/bin/main.rs @@ -100,20 +100,14 @@ async fn main(spawner: Spawner) { counter += 1; let msg = if counter % 2 == 0 { - b"AAAAA\n" + b"AAAAA\r\n" } else { - b"Hello\n" + b"Hello\r\n" }; PIPE_SW_TX.write(msg).await; info!("Sent: {:a}", msg); - Timer::after(Duration::from_millis(100)).await; - - // Also read any incoming data from internal UART RX pipe - let n2 = PIPE_INT_RX.read(&mut buf).await; - if n2 > 0 { - info!("HW INT UART RX pipe: {:a}", &buf[..n2]); - } + Timer::after(Duration::from_secs(3)).await; yield_now().await; } @@ -156,6 +150,7 @@ pub async fn tx_cpu_task( ) { use dma_gpio::software_uart::uart_emulation::encode_uart_byte_cfg; use embassy_futures::yield_now; + use dma_gpio::config::{TX_PIN_BIT, UART_CFG}; // Access TIM6 registers directly via PAC let tim6_regs = embassy_stm32::pac::TIM6; @@ -171,11 +166,24 @@ pub async fn tx_cpu_task( for &byte in &rx_buf[..n] { let used = encode_uart_byte_cfg(TX_PIN_BIT, byte, &UART_CFG, &mut frame_buf); + + // === SYNC LOGIC === + // Reset timer counter to 0 using Event Generation Register (UG bit) + // This ensures we start counting exactly from now. + tim6_regs.egr().write(|w| w.set_ug(true)); + // The UG event sets the UIF flag immediately. We must clear it. + tim6_regs.sr().write(|w| w.set_uif(false)); + + // Now we loop through the encoded frame. + // Since we just reset the timer and cleared UIF, the first wait + // will block for exactly 1 bit-period. + // This effectively adds 1 bit of idle time before the Start Bit, + // which guarantees the line is stable High before dropping Low. for word in &frame_buf[..used] { while !tim6_regs.sr().read().uif() { yield_now().await; } - tim6_regs.sr().modify(|w| w.set_uif(false)); + tim6_regs.sr().write(|w| w.set_uif(false)); unsafe { core::ptr::write_volatile(bsrr_ptr, *word) }; } } diff --git a/semestralka_1e_tx_bez_dma/src/config.rs b/semestralka_1e_tx_bez_dma/src/config.rs index 2d88a77..39cfefd 100644 --- a/semestralka_1e_tx_bez_dma/src/config.rs +++ b/semestralka_1e_tx_bez_dma/src/config.rs @@ -3,7 +3,7 @@ use crate::software_uart::uart_emulation::{Parity, StopBits, UartConfig}; use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; use embassy_sync::pipe::Pipe; -pub const BAUD: u32 = 115_200; +pub const BAUD: u32 = 600; // pub const TX_PIN_BIT: u8 = 2; // PA2 // pub const RX_PIN_BIT: u8 = 3; // PA3 pub const TX_PIN_BIT: u8 = 0; // PB2