compiled hw and sw uart in semestralka

This commit is contained in:
Filipriec
2025-11-11 21:39:46 +01:00
parent 17c205f23b
commit 19536dde78
5 changed files with 29 additions and 32 deletions

View File

@@ -1,6 +1,5 @@
// src/uart/driver.rs
use defmt::unwrap;
use embassy_executor::Spawner;
use embassy_futures::select::{select, Either};
use embassy_stm32::usart::BufferedUart;
use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
@@ -8,7 +7,7 @@ use embassy_sync::pipe::Pipe;
use embassy_time::Duration;
use embedded_io_async::{Read, Write};
use crate::uart::safety::{RX_PIPE_CAP, TX_PIPE_CAP};
use crate::hw_uart_pc::safety::{RX_PIPE_CAP, TX_PIPE_CAP};
pub struct UartHandle {
pub tx: &'static Pipe<CriticalSectionRawMutex, TX_PIPE_CAP>,
@@ -36,9 +35,7 @@ pub async fn uart_task(
// Incoming data from UART hardware
Either::First(res) => {
if let Ok(_) = res {
// Forward to RX pipe and echo to TX pipe (same behavior as before)
let _ = rx_pipe.write(&rx_byte).await;
let _ = tx_pipe.try_write(&rx_byte);
}
}
// Outgoing data waiting in TX pipe
@@ -48,18 +45,3 @@ pub async fn uart_task(
}
}
}
pub fn spawn_for(
spawner: &Spawner,
uart: BufferedUart<'static>,
tx_pipe: &'static Pipe<CriticalSectionRawMutex, TX_PIPE_CAP>,
rx_pipe: &'static Pipe<CriticalSectionRawMutex, RX_PIPE_CAP>,
yield_period: Duration,
) -> UartHandle {
spawner.spawn(uart_task(uart, tx_pipe, rx_pipe)).unwrap();
UartHandle {
tx: tx_pipe,
rx: rx_pipe,
yield_period,
}
}