compiled hw and sw uart in semestralka

This commit is contained in:
Filipriec
2025-11-11 21:39:46 +01:00
parent 17c205f23b
commit 19536dde78
5 changed files with 29 additions and 32 deletions

View File

@@ -4,6 +4,7 @@
use defmt::*;
use embassy_executor::Spawner;
use embassy_time::Instant;
use embassy_stm32::dma::Request;
use embassy_stm32::gpio::{Input, Output, Level, Pull, Speed};
use embassy_sync::{blocking_mutex::raw::CriticalSectionRawMutex, pipe::Pipe};
@@ -17,9 +18,11 @@ use dma_gpio::config::{TX_RING_BYTES, RX_RING_BYTES, PIPE_RX_SIZE};
use dma_gpio::software_uart::gpio_dma_uart_tx::tx_dma_task;
use static_cell::StaticCell;
use embassy_futures::yield_now;
use hw_uart_pc::usart1;
use dma_gpio::hw_uart_pc::usart1;
use dma_gpio::hw_uart_pc::driver::uart_task;
use embassy_stm32::usart::{BufferedUart, Config, BufferedInterruptHandler};
use embassy_stm32::peripherals;
use embassy_stm32::bind_interrupts;
use {defmt_rtt as _, panic_probe as _};
bind_interrupts!(struct Irqs {
@@ -53,7 +56,8 @@ async fn main(spawner: Spawner) {
Irqs,
cfg,
).unwrap();
let handle = usart1::setup_and_spawn(&spawner, uart, cfg.baudrate);
let (handle, yield_period) = usart1::setup_and_spawn(BAUD);
spawner.spawn(uart_task(uart, handle.tx, handle.rx).unwrap());
// END OF HARDWARE UART to the PC
// SOFTWARE UART
@@ -74,11 +78,17 @@ async fn main(spawner: Spawner) {
spawner.spawn(tx_dma_task(p.GPDMA1_CH0, odr_ptr, tx_ring_mem, &PIPE_RX).unwrap());
// EDN OF SOFTWARE UART
let mut last_yield = Instant::now();
loop {
info!("tick start");
// Timer::after(Duration::from_millis(100)).await;
// info!("tick end");
yield_now().await;
if Instant::now().duration_since(last_yield) >= handle.yield_period {
embassy_futures::yield_now().await;
last_yield = Instant::now();
}
}
}