examples init

tm4c-rtic-example/target/debug/build/cortex-m-3119ce05e48f9355/invoked.timestamp

@@ -0,0 +1 @@
+This file has an mtime of when this was started.

tm4c-rtic-example/target/debug/build/cortex-m-3119ce05e48f9355/output

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+cargo:rustc-cfg=native

tm4c-rtic-example/target/debug/build/cortex-m-3119ce05e48f9355/root-output

@@ -0,0 +1 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/cortex-m-3119ce05e48f9355/out

tm4c-rtic-example/target/debug/build/cortex-m-7fd3dbd730ff3fc2/build_script_build-7fd3dbd730ff3fc2.d

@@ -0,0 +1,5 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/cortex-m-7fd3dbd730ff3fc2/build_script_build-7fd3dbd730ff3fc2.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-0.7.7/build.rs
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/cortex-m-7fd3dbd730ff3fc2/build_script_build-7fd3dbd730ff3fc2: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-0.7.7/build.rs
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-0.7.7/build.rs:

tm4c-rtic-example/target/debug/build/cortex-m-rt-07a5a77c83520fe6/build_script_build-07a5a77c83520fe6.d

@@ -0,0 +1,6 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/cortex-m-rt-07a5a77c83520fe6/build_script_build-07a5a77c83520fe6.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-rt-0.7.5/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-rt-0.7.5/link.x.in
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/cortex-m-rt-07a5a77c83520fe6/build_script_build-07a5a77c83520fe6: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-rt-0.7.5/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-rt-0.7.5/link.x.in
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-rt-0.7.5/build.rs:
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/cortex-m-rt-0.7.5/link.x.in:

tm4c-rtic-example/target/debug/build/cortex-m-rt-728fd62e60ea4895/invoked.timestamp

@@ -0,0 +1 @@
+This file has an mtime of when this was started.

tm4c-rtic-example/target/debug/build/cortex-m-rt-728fd62e60ea4895/out/link.x

@@ -0,0 +1,285 @@
+/* # Developer notes
+
+- Symbols that start with a double underscore (__) are considered "private"
+
+- Symbols that start with a single underscore (_) are considered "semi-public"; they can be
+  overridden in a user linker script, but should not be referred from user code (e.g. `extern "C" {
+  static mut __sbss }`).
+
+- `EXTERN` forces the linker to keep a symbol in the final binary. We use this to make sure a
+  symbol is not dropped if it appears in or near the front of the linker arguments and "it's not
+  needed" by any of the preceding objects (linker arguments)
+
+- `PROVIDE` is used to provide default values that can be overridden by a user linker script
+
+- On alignment: it's important for correctness that the VMA boundaries of both .bss and .data *and*
+  the LMA of .data are all 4-byte aligned. These alignments are assumed by the RAM initialization
+  routine. There's also a second benefit: 4-byte aligned boundaries means that you won't see
+  "Address (..) is out of bounds" in the disassembly produced by `objdump`.
+*/
+
+/* Provides information about the memory layout of the device */
+/* This will be provided by the user (see `memory.x`) or by a Board Support Crate */
+INCLUDE memory.x
+
+/* # Entry point = reset vector */
+EXTERN(__RESET_VECTOR);
+EXTERN(Reset);
+ENTRY(Reset);
+
+/* # Exception vectors */
+/* This is effectively weak aliasing at the linker level */
+/* The user can override any of these aliases by defining the corresponding symbol themselves (cf.
+   the `exception!` macro) */
+EXTERN(__EXCEPTIONS); /* depends on all the these PROVIDED symbols */
+
+EXTERN(DefaultHandler);
+
+PROVIDE(NonMaskableInt = DefaultHandler);
+EXTERN(HardFaultTrampoline);
+PROVIDE(MemoryManagement = DefaultHandler);
+PROVIDE(BusFault = DefaultHandler);
+PROVIDE(UsageFault = DefaultHandler);
+PROVIDE(SecureFault = DefaultHandler);
+PROVIDE(SVCall = DefaultHandler);
+PROVIDE(DebugMonitor = DefaultHandler);
+PROVIDE(PendSV = DefaultHandler);
+PROVIDE(SysTick = DefaultHandler);
+
+PROVIDE(DefaultHandler = DefaultHandler_);
+PROVIDE(HardFault = HardFault_);
+
+/* # Interrupt vectors */
+EXTERN(__INTERRUPTS); /* `static` variable similar to `__EXCEPTIONS` */
+
+/* # Pre-initialization function */
+/* If the user overrides this using the `pre_init!` macro or by creating a `__pre_init` function,
+   then the function this points to will be called before the RAM is initialized. */
+PROVIDE(__pre_init = DefaultPreInit);
+
+/* # Sections */
+SECTIONS
+{
+  PROVIDE(_ram_start = ORIGIN(RAM));
+  PROVIDE(_ram_end = ORIGIN(RAM) + LENGTH(RAM));
+  PROVIDE(_stack_start = _ram_end);
+
+  /* ## Sections in FLASH */
+  /* ### Vector table */
+  .vector_table ORIGIN(FLASH) :
+  {
+    __vector_table = .;
+
+    /* Initial Stack Pointer (SP) value.
+     * We mask the bottom three bits to force 8-byte alignment.
+     * Despite having an assert for this later, it's possible that a separate
+     * linker script could override _stack_start after the assert is checked.
+     */
+    LONG(_stack_start & 0xFFFFFFF8);
+
+    /* Reset vector */
+    KEEP(*(.vector_table.reset_vector)); /* this is the `__RESET_VECTOR` symbol */
+
+    /* Exceptions */
+    __exceptions = .; /* start of exceptions */
+    KEEP(*(.vector_table.exceptions)); /* this is the `__EXCEPTIONS` symbol */
+    __eexceptions = .; /* end of exceptions */
+
+    /* Device specific interrupts */
+    KEEP(*(.vector_table.interrupts)); /* this is the `__INTERRUPTS` symbol */
+  } > FLASH
+
+  PROVIDE(_stext = ADDR(.vector_table) + SIZEOF(.vector_table));
+
+  /* ### .text */
+  .text _stext :
+  {
+    __stext = .;
+    *(.Reset);
+
+    *(.text .text.*);
+
+    /* The HardFaultTrampoline uses the `b` instruction to enter `HardFault`,
+       so must be placed close to it. */
+    *(.HardFaultTrampoline);
+    *(.HardFault.*);
+
+    . = ALIGN(4); /* Pad .text to the alignment to workaround overlapping load section bug in old lld */
+    __etext = .;
+  } > FLASH
+
+  /* ### .rodata */
+  .rodata : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __srodata = .;
+    *(.rodata .rodata.*);
+
+    /* 4-byte align the end (VMA) of this section.
+       This is required by LLD to ensure the LMA of the following .data
+       section will have the correct alignment. */
+    . = ALIGN(4);
+    __erodata = .;
+  } > FLASH
+
+  /* ## Sections in RAM */
+  /* ### .data */
+  .data : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __sdata = .;
+    *(.data .data.*);
+    . = ALIGN(4); /* 4-byte align the end (VMA) of this section */
+  } > RAM AT>FLASH
+  /* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to
+   * use the .data loading mechanism by pushing __edata. Note: do not change
+   * output region or load region in those user sections! */
+  . = ALIGN(4);
+  __edata = .;
+
+  /* LMA of .data */
+  __sidata = LOADADDR(.data);
+
+  /* ### .gnu.sgstubs
+     This section contains the TrustZone-M veneers put there by the Arm GNU linker. */
+  /* Security Attribution Unit blocks must be 32 bytes aligned. */
+  /* Note that this pads the FLASH usage to 32 byte alignment. */
+  .gnu.sgstubs : ALIGN(32)
+  {
+    . = ALIGN(32);
+    __veneer_base = .;
+    *(.gnu.sgstubs*)
+    . = ALIGN(32);
+  } > FLASH
+  /* Place `__veneer_limit` outside the `.gnu.sgstubs` section because veneers are
+   * always inserted last in the section, which would otherwise be _after_ the `__veneer_limit` symbol.
+   */
+  . = ALIGN(32);
+  __veneer_limit = .;
+
+  /* ### .bss */
+  .bss (NOLOAD) : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __sbss = .;
+    *(.bss .bss.*);
+    *(COMMON); /* Uninitialized C statics */
+    . = ALIGN(4); /* 4-byte align the end (VMA) of this section */
+  } > RAM
+  /* Allow sections from user `memory.x` injected using `INSERT AFTER .bss` to
+   * use the .bss zeroing mechanism by pushing __ebss. Note: do not change
+   * output region or load region in those user sections! */
+  . = ALIGN(4);
+  __ebss = .;
+
+  /* ### .uninit */
+  .uninit (NOLOAD) : ALIGN(4)
+  {
+    . = ALIGN(4);
+    __suninit = .;
+    *(.uninit .uninit.*);
+    . = ALIGN(4);
+    __euninit = .;
+  } > RAM
+
+  /* Place the heap right after `.uninit` in RAM */
+  PROVIDE(__sheap = __euninit);
+
+  /* Place stack end at the end of allocated RAM */
+  PROVIDE(_stack_end = __euninit);
+
+  /* ## .got */
+  /* Dynamic relocations are unsupported. This section is only used to detect relocatable code in
+     the input files and raise an error if relocatable code is found */
+  .got (NOLOAD) :
+  {
+    KEEP(*(.got .got.*));
+  }
+
+  /* ## Discarded sections */
+  /DISCARD/ :
+  {
+    /* Unused exception related info that only wastes space */
+    *(.ARM.exidx);
+    *(.ARM.exidx.*);
+    *(.ARM.extab.*);
+  }
+}
+
+/* Do not exceed this mark in the error messages below                                    | */
+/* # Alignment checks */
+ASSERT(ORIGIN(FLASH) % 4 == 0, "
+ERROR(cortex-m-rt): the start of the FLASH region must be 4-byte aligned");
+
+ASSERT(ORIGIN(RAM) % 4 == 0, "
+ERROR(cortex-m-rt): the start of the RAM region must be 4-byte aligned");
+
+ASSERT(__sdata % 4 == 0 && __edata % 4 == 0, "
+BUG(cortex-m-rt): .data is not 4-byte aligned");
+
+ASSERT(__sidata % 4 == 0, "
+BUG(cortex-m-rt): the LMA of .data is not 4-byte aligned");
+
+ASSERT(__sbss % 4 == 0 && __ebss % 4 == 0, "
+BUG(cortex-m-rt): .bss is not 4-byte aligned");
+
+ASSERT(__sheap % 4 == 0, "
+BUG(cortex-m-rt): start of .heap is not 4-byte aligned");
+
+ASSERT(_stack_start % 8 == 0, "
+ERROR(cortex-m-rt): stack start address is not 8-byte aligned.
+If you have set _stack_start, check it's set to an address which is a multiple of 8 bytes.
+If you haven't, stack starts at the end of RAM by default. Check that both RAM
+origin and length are set to multiples of 8 in the `memory.x` file.");
+
+ASSERT(_stack_end % 4 == 0, "
+ERROR(cortex-m-rt): end of stack is not 4-byte aligned");
+
+ASSERT(_stack_start >= _stack_end, "
+ERROR(cortex-m-rt): stack end address is not below stack start.");
+
+/* # Position checks */
+
+/* ## .vector_table
+ *
+ * If the *start* of exception vectors is not 8 bytes past the start of the
+ * vector table, then we somehow did not place the reset vector, which should
+ * live 4 bytes past the start of the vector table.
+ */
+ASSERT(__exceptions == ADDR(.vector_table) + 0x8, "
+BUG(cortex-m-rt): the reset vector is missing");
+
+ASSERT(__eexceptions == ADDR(.vector_table) + 0x40, "
+BUG(cortex-m-rt): the exception vectors are missing");
+
+ASSERT(SIZEOF(.vector_table) > 0x40, "
+ERROR(cortex-m-rt): The interrupt vectors are missing.
+Possible solutions, from most likely to less likely:
+- Link to a svd2rust generated device crate
+- Check that you actually use the device/hal/bsp crate in your code
+- Disable the 'device' feature of cortex-m-rt to build a generic application (a dependency
+may be enabling it)
+- Supply the interrupt handlers yourself. Check the documentation for details.");
+
+/* ## .text */
+ASSERT(ADDR(.vector_table) + SIZEOF(.vector_table) <= _stext, "
+ERROR(cortex-m-rt): The .text section can't be placed inside the .vector_table section
+Set _stext to an address greater than the end of .vector_table (See output of `nm`)");
+
+ASSERT(_stext > ORIGIN(FLASH) && _stext < ORIGIN(FLASH) + LENGTH(FLASH), "
+ERROR(cortex-m-rt): The .text section must be placed inside the FLASH memory.
+Set _stext to an address within the FLASH region.");
+
+/* # Other checks */
+ASSERT(SIZEOF(.got) == 0, "
+ERROR(cortex-m-rt): .got section detected in the input object files
+Dynamic relocations are not supported. If you are linking to C code compiled using
+the 'cc' crate then modify your build script to compile the C code _without_
+the -fPIC flag. See the documentation of the `cc::Build.pic` method for details.");
+/* Do not exceed this mark in the error messages above                                    | */
+
+ASSERT(SIZEOF(.vector_table) <= 0x400, "
+There can't be more than 240 interrupt handlers. This may be a bug in
+your device crate, or you may have registered more than 240 interrupt
+handlers.");
+

tm4c-rtic-example/target/debug/build/cortex-m-rt-728fd62e60ea4895/output

@@ -0,0 +1,8 @@
+cargo:rustc-check-cfg=cfg(armv6m)
+cargo:rustc-check-cfg=cfg(armv7m)
+cargo:rustc-check-cfg=cfg(armv8m)
+cargo:rustc-check-cfg=cfg(cortex_m)
+cargo:rustc-check-cfg=cfg(has_fpu)
+cargo:rustc-link-search=/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/cortex-m-rt-728fd62e60ea4895/out
+cargo:rerun-if-changed=build.rs
+cargo:rerun-if-changed=link.x.in

tm4c-rtic-example/target/debug/build/cortex-m-rt-728fd62e60ea4895/root-output

@@ -0,0 +1 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/cortex-m-rt-728fd62e60ea4895/out

tm4c-rtic-example/target/debug/build/portable-atomic-341169085fcbca1c/build_script_build-341169085fcbca1c.d

@@ -0,0 +1,9 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/portable-atomic-341169085fcbca1c/build_script_build-341169085fcbca1c.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/version.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/src/gen/build.rs
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/portable-atomic-341169085fcbca1c/build_script_build-341169085fcbca1c: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/version.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/src/gen/build.rs
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/build.rs:
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/version.rs:
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/portable-atomic-1.11.1/src/gen/build.rs:
+
+# env-dep:CARGO_PKG_NAME=portable-atomic

tm4c-rtic-example/target/debug/build/proc-macro2-17e32568540fc90a/build_script_build-17e32568540fc90a.d

@@ -0,0 +1,5 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/proc-macro2-17e32568540fc90a/build_script_build-17e32568540fc90a.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/proc-macro2-1.0.101/build.rs
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/proc-macro2-17e32568540fc90a/build_script_build-17e32568540fc90a: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/proc-macro2-1.0.101/build.rs
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/proc-macro2-1.0.101/build.rs:

tm4c-rtic-example/target/debug/build/proc-macro2-c3506195f8804da6/invoked.timestamp

@@ -0,0 +1 @@
+This file has an mtime of when this was started.

tm4c-rtic-example/target/debug/build/proc-macro2-c3506195f8804da6/output

@@ -0,0 +1,21 @@
+cargo:rustc-check-cfg=cfg(fuzzing)
+cargo:rustc-check-cfg=cfg(no_is_available)
+cargo:rustc-check-cfg=cfg(no_literal_byte_character)
+cargo:rustc-check-cfg=cfg(no_literal_c_string)
+cargo:rustc-check-cfg=cfg(no_source_text)
+cargo:rustc-check-cfg=cfg(proc_macro_span)
+cargo:rustc-check-cfg=cfg(proc_macro_span_file)
+cargo:rustc-check-cfg=cfg(proc_macro_span_location)
+cargo:rustc-check-cfg=cfg(procmacro2_backtrace)
+cargo:rustc-check-cfg=cfg(procmacro2_build_probe)
+cargo:rustc-check-cfg=cfg(procmacro2_nightly_testing)
+cargo:rustc-check-cfg=cfg(procmacro2_semver_exempt)
+cargo:rustc-check-cfg=cfg(randomize_layout)
+cargo:rustc-check-cfg=cfg(span_locations)
+cargo:rustc-check-cfg=cfg(super_unstable)
+cargo:rustc-check-cfg=cfg(wrap_proc_macro)
+cargo:rerun-if-changed=src/probe/proc_macro_span.rs
+cargo:rustc-cfg=wrap_proc_macro
+cargo:rustc-cfg=proc_macro_span
+cargo:rustc-cfg=proc_macro_span_location
+cargo:rustc-cfg=proc_macro_span_file

tm4c-rtic-example/target/debug/build/proc-macro2-c3506195f8804da6/root-output

@@ -0,0 +1 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/proc-macro2-c3506195f8804da6/out

tm4c-rtic-example/target/debug/build/quote-29c9639cefb85ff6/invoked.timestamp

@@ -0,0 +1 @@
+This file has an mtime of when this was started.

tm4c-rtic-example/target/debug/build/quote-29c9639cefb85ff6/output

@@ -0,0 +1,2 @@
+cargo:rerun-if-changed=build.rs
+cargo:rustc-check-cfg=cfg(no_diagnostic_namespace)

tm4c-rtic-example/target/debug/build/quote-29c9639cefb85ff6/root-output

@@ -0,0 +1 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/quote-29c9639cefb85ff6/out

tm4c-rtic-example/target/debug/build/quote-9cf6aa672522b25c/build_script_build-9cf6aa672522b25c.d

@@ -0,0 +1,5 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/quote-9cf6aa672522b25c/build_script_build-9cf6aa672522b25c.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/quote-1.0.41/build.rs
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/quote-9cf6aa672522b25c/build_script_build-9cf6aa672522b25c: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/quote-1.0.41/build.rs
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/quote-1.0.41/build.rs:

tm4c-rtic-example/target/debug/build/rtic-5913830efd2a559f/build_script_build-5913830efd2a559f.d

@@ -0,0 +1,5 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/rtic-5913830efd2a559f/build_script_build-5913830efd2a559f.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/rtic-2.2.0/build.rs
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/rtic-5913830efd2a559f/build_script_build-5913830efd2a559f: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/rtic-2.2.0/build.rs
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/rtic-2.2.0/build.rs:

tm4c-rtic-example/target/debug/build/rtic-f02fc6ad56d499dd/invoked.timestamp

@@ -0,0 +1 @@
+This file has an mtime of when this was started.

tm4c-rtic-example/target/debug/build/tm4c123x-3ef493916f99eecc/invoked.timestamp

@@ -0,0 +1 @@
+This file has an mtime of when this was started.

tm4c-rtic-example/target/debug/build/tm4c123x-3ef493916f99eecc/output

@@ -0,0 +1 @@
+cargo:rerun-if-changed=build.rs

tm4c-rtic-example/target/debug/build/tm4c123x-3ef493916f99eecc/root-output

@@ -0,0 +1 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/tm4c123x-3ef493916f99eecc/out

tm4c-rtic-example/target/debug/build/tm4c123x-82f3ece301fcf5ca/build_script_build-82f3ece301fcf5ca.d

@@ -0,0 +1,6 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/tm4c123x-82f3ece301fcf5ca/build_script_build-82f3ece301fcf5ca.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-0.9.2/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-0.9.2/device.x
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/tm4c123x-82f3ece301fcf5ca/build_script_build-82f3ece301fcf5ca: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-0.9.2/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-0.9.2/device.x
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-0.9.2/build.rs:
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-0.9.2/device.x:

tm4c-rtic-example/target/debug/build/tm4c123x-hal-1e96ddca682f6e10/invoked.timestamp

@@ -0,0 +1 @@
+This file has an mtime of when this was started.

tm4c-rtic-example/target/debug/build/tm4c123x-hal-1e96ddca682f6e10/out/memory.x

@@ -0,0 +1,5 @@
+MEMORY
+{
+    FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+    RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}

tm4c-rtic-example/target/debug/build/tm4c123x-hal-1e96ddca682f6e10/output

@@ -0,0 +1,3 @@
+cargo:rustc-link-search=/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/tm4c123x-hal-1e96ddca682f6e10/out
+cargo:rerun-if-changed=build.rs
+cargo:rerun-if-changed=memory.x

tm4c-rtic-example/target/debug/build/tm4c123x-hal-1e96ddca682f6e10/root-output

@@ -0,0 +1 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/tm4c123x-hal-1e96ddca682f6e10/out

tm4c-rtic-example/target/debug/build/tm4c123x-hal-9d37457c410a02ba/build_script_build-9d37457c410a02ba.d

@@ -0,0 +1,6 @@
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/tm4c123x-hal-9d37457c410a02ba/build_script_build-9d37457c410a02ba.d: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-hal-0.10.3/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-hal-0.10.3/memory.x
+
+/home/filip/Documents/programming/uni/progvs/tm4c-rtic-example/target/debug/build/tm4c123x-hal-9d37457c410a02ba/build_script_build-9d37457c410a02ba: /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-hal-0.10.3/build.rs /home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-hal-0.10.3/memory.x
+
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-hal-0.10.3/build.rs:
+/home/filip/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/tm4c123x-hal-0.10.3/memory.x: