diff --git a/project_7/project_5.srcs/constrs_1/imports/Downloads/Basys-3-Master.xdc b/project_7/project_5.srcs/constrs_1/imports/Downloads/Basys-3-Master.xdc
index d90a44f..c22357c 100644
--- a/project_7/project_5.srcs/constrs_1/imports/Downloads/Basys-3-Master.xdc
+++ b/project_7/project_5.srcs/constrs_1/imports/Downloads/Basys-3-Master.xdc
@@ -13,16 +13,17 @@ set_property -dict { PACKAGE_PIN V17   IOSTANDARD LVCMOS33 } [get_ports {RST}]
 set_property -dict { PACKAGE_PIN V16   IOSTANDARD LVCMOS33 } [get_ports {START}]
 
 set_property -dict { PACKAGE_PIN W16   IOSTANDARD LVCMOS33 } [get_ports {SW_MODE}]
-#set_property -dict { PACKAGE_PIN W17   IOSTANDARD LVCMOS33 } [get_ports {sw[3]}]
-#set_property -dict { PACKAGE_PIN W15   IOSTANDARD LVCMOS33 } [get_ports {sw[4]}]
+set_property -dict { PACKAGE_PIN W17   IOSTANDARD LVCMOS33 } [get_ports {SW_STOP_SET}]
+set_property -dict { PACKAGE_PIN W15   IOSTANDARD LVCMOS33 } [get_ports {SW_ALARM_SET}]
 #set_property -dict { PACKAGE_PIN V15   IOSTANDARD LVCMOS33 } [get_ports {sw[5]}]
 #set_property -dict { PACKAGE_PIN W14   IOSTANDARD LVCMOS33 } [get_ports {sw[6]}]
 #set_property -dict { PACKAGE_PIN W13   IOSTANDARD LVCMOS33 } [get_ports {sw[7]}]
-#set_property -dict { PACKAGE_PIN V2    IOSTANDARD LVCMOS33 } [get_ports {sw[8]}]
-#set_property -dict { PACKAGE_PIN T3    IOSTANDARD LVCMOS33 } [get_ports {sw[9]}]
-set_property -dict { PACKAGE_PIN T2    IOSTANDARD LVCMOS33 } [get_ports {RST_B}]
+#set_property -dict { PACKAGE_PIN V2    IOSTANDARD LVCMOS33 } [get_ports {RST_B}]
+#set_property -dict { PACKAGE_PIN T3    IOSTANDARD LVCMOS33 } [get_ports {RST_C}]
+# Stopky
+set_property -dict { PACKAGE_PIN T2    IOSTANDARD LVCMOS33 } [get_ports {RST_C}]
 # Budik 
-set_property -dict { PACKAGE_PIN R3    IOSTANDARD LVCMOS33 } [get_ports {SW_ALARM_SET}]
+set_property -dict { PACKAGE_PIN R3    IOSTANDARD LVCMOS33 } [get_ports {RST_B}]
 set_property -dict { PACKAGE_PIN W2    IOSTANDARD LVCMOS33 } [get_ports {SW_DIN[0]}]
 set_property -dict { PACKAGE_PIN U1    IOSTANDARD LVCMOS33 } [get_ports {SW_DIN[1]}]
 set_property -dict { PACKAGE_PIN T1    IOSTANDARD LVCMOS33 } [get_ports {SW_DIN[2]}]
diff --git a/project_7/project_5.srcs/sources_1/new/top_modul.vhd b/project_7/project_5.srcs/sources_1/new/top_modul.vhd
index d29c490..d933d1b 100644
--- a/project_7/project_5.srcs/sources_1/new/top_modul.vhd
+++ b/project_7/project_5.srcs/sources_1/new/top_modul.vhd
@@ -159,7 +159,6 @@ begin
                 cap_m_tens  <= "0000";
                 cap_h_units <= "0000";
                 cap_h_tens  <= "0000";
-                stops_running <= '0';
             elsif SW_STOP_SET = '1' and sw_stop_prev = '0' then 
                 cap_s_units <= stop_s_units;
                 cap_s_tens  <= stop_s_tens;